Learned Latent Curves, applied directly to a given corpus.

Category:

What we can do with these equations so far

The 9 equations in papers/learned-latent-curves-2026-08-06.tex unlock a complete curve-guided RSI loop. Here’s the operating surface, grouped by what each unlocks:

A. Curve-fit any corpus on [0,1] or S²

  • eq:flat + eq:design + eq:paramflat — fit a flat Fourier curve $z_j(t) = a_{j,0} + \sum_m (a_{j,m}\sin 2\pi f_m t + b_{j,m}\cos 2\pi f_m t)$ on $[0,1]$ with $k$ shared frequencies and $D$ output dims. 6,528 params at $D=384, k=8$.
  • eq:hyperspherical — same family on $S^2$ with spherical harmonics $Y^{S^2}{\ell,m}$ via a Möbius $\phi\theta \in \mathrm{PSL}(2,\mathbb{C})$ reparameterization. 6,534 params at $L=3, D=384$. The matched-parameter ablation shows $\delta = +0.977$ (49-item) and $+1.342$ (70-item) over the flat baseline — the sphere is a strictly better inductive bias.
  • eq:ridge — $C^\star = (\Phi^\top\Phi + \lambda I)^{-1} \Phi^\top Z$ is the closed-form Tikhonov solve. Any GD fit that underperforms this at the same $f$ has a bug, not a model issue.

B. Map any file to a point on $S^2$

  • eq:stereographic + the 6-step atom procedure (line 145-159) — given a corpus item, compute its 9-D binary coverage vector, weighted aggregate (thresholded at 0.5), PCA top-2 via SVD, stereographic lift, chordal distance to the ideal pole. The result: one point $p = \sigma(\bar u, \bar v) \in S^2$ per file, with a defined geodesic gap $d(f) = |p – p^\star|_2$.

C. Audit any corpus for missing primitives

  • The 9-D binary primitive basis $\mathcal{P} = (p_0, \ldots, p_8)$ is fixed; each file gets pattern-matched against it.
  • For each missing primitive $i \in {j : c_j = 0}$, simulate the flip $c_i := 1$, recompute $p’$, select $i^\star = \arg\min_i d_{\mathrm{post}}(f)$.
  • This is the geodesic-only criterion — the chosen action strictly minimizes post-flip geodesic distance to the ideal pole.

D. Prove the cumulative monotonicity invariant

  • eq:composition + Lemma 1 + Theorem 1 + Corollary 1 — $\Delta_{\mathrm{corpus}} = \sum_i \Delta_{f_i}$. Each atomic $\Delta \geq 0$ by the geodesic-only criterion, so $\Delta_{\mathrm{corpus}} \geq 0$ monotonically across cycles. The 474-dispatch atom experiment on the 79-skill corpus showed zero negative $\Delta$.

E. Refit the domain when the corpus grows

  • Möbius refinement strategy (Section 3.4) — $\phi_\theta$ is a single 6-real-DOF Möbius transformation. Default: refine-once at corpus creation, freeze for all subsequent cycles. Re-fit when $N_{\mathrm{items}} < 30$ OR corpus growth > 25% since last refine.

F. Sample the sphere without pole clustering

  • Fibonacci sampling (line 110-115) — Vogel’s golden-angle scheme: $z_i = 1 – (2i+1)/N$, $\phi_i = 2\pi i/\varphi$, $\theta_i = \arccos(z_i)$, $\varphi = (1+\sqrt{5})/2$. The corpus item at index $i$ IS the parameter point — no lookup table, O(1) per point. Eliminates the pole-clustering problem of standard latitude-longitude grids.
  • $Y_3^3$ angular probe (line 117-121) — $\Re{Y_3^3} = K\sin^3\theta\cos(3\phi)$, $K = \sqrt{245/64\pi}$. Per-item basis $b_i = (\sin^3\theta_i\cos(m_1\phi_i), \ldots)$ with $m_k = 3k$ for $k=1..128$ (384 = $2^7 \cdot 3$). Both orderings $(\ell=128, m=256)$ and $(\ell=256, m=128)$ tested per cycle, pick higher PC1+PC2.

G. Gate the fit-quality with PC1+PC2 ≥ 0.40

  • The fit-quality gate — for any corpus fit, the PC1+PC2 explained-variance ratio must clear 0.40 or the curve is rejected as uninformative. This is the structural test that the corpus has signal worth modeling.

H. Drive a closed-loop RSI regime on any corpus

  • The operational primitive — rsi-phi-skill (added 2026-08-07 in PR #200) operationalizes all of the above as one agent skill. It accepts a corpus, fits the sphere, runs the atom on each file, applies the geodesic-only action, accumulates $\Delta_{\mathrm{corpus}}$, and refits $\phi_\theta$ on corpus growth. The 79-skill corpus dataset (Section 4) is the canonical example.

I. Compose three regimes with a Merkle-tree integrity proof

  • The session’s own contribution (v0.28) — the single-action atom insight decomposes the .ods spreadsheet into atom-eligible / atom-deferred / atom-refused regimes. S² closes both failure modes (compact → no outside; bounded → no undefined). The Merkle tree at root 3e32eef859a758db124e91aa04724f1bbc0481ef9968e600d7fcafb8f1d7ff4e independently verifies that this session’s six artifacts cohere as one corpus of evidence.

In one sentence: the equations let you take any corpus, fit it on S² with a strictly better inductive bias than flat $[0,1]^2$, audit every file for missing 9-D primitives, prove each individual action strictly improves geodesic distance, and accumulate non-negative deltas across cycles — all with a closed-form sanity floor (the ridge) and a growth-conditional refit path (the Möbius). The session artifact (the Merkle tree + the single-action atom insight) is the structural proof that these primitives compose linearly across the corpus.

Learned Latent Space, Precursor to ASI

Category:

====================

User prompt 1 of 6 – 8/3/2026, 5:53:21 PM:
Take an N-th dimensional surface and make it 1-D

GPT-5.4 mini:
Use a 1D parameterization or projection.

If you want to turn an (N)-dimensional surface into a single number (x \in \mathbb{R}), you can define a function

[
f:\mathbb{R}^N \to \mathbb{R}
]

Common ways:

  • Projection: (x = w^\top y) for some weight vector (w)
  • Distance along a path: trace a curve on the surface and use arc length (s)
  • Embedding/compression: PCA, autoencoder, manifold learning
  • A scalar field: map each point to one value like curvature, height, or energy

If you mean losslessly, that’s generally impossible unless the object is already effectively 1D.
If you mean reduce it for analysis, projection is the usual answer.

If you want, I can show the exact math for a specific (N)-D surface.


User prompt 2 of 6 – 8/3/2026, 6:03:24 PM:
manifold learning 1-D → 384-D

GPT-5.4 mini:
That’s an embedding from 1D into a 384-dimensional feature space:

[
f:\mathbb{R}\rightarrow \mathbb{R}^{384}
]

A point (t) on the 1D manifold becomes a vector

[
\mathbf{z}(t) = [z_1(t), z_2(t), \dots, z_{384}(t)]
]

Common ways to do it:

  • Neural network encoder/decoder: learn (t \mapsto \mathbf{z})
  • Basis expansion: spline/Fourier/RBF features
  • Random projection / positional encoding: deterministic map into 384 dims
  • Learned latent curve: a 1D curve embedded in 384-D space

If you mean manifold learning, the key idea is: the data live on a 1D structure, but are represented in 384-D.

If you want, I can sketch a concrete model architecture for a 1D→384D embedding.


User prompt 3 of 6 – 8/3/2026, 6:05:15 PM:
Learned latent curve with a Fourier transformation

GPT-5.4 mini:
Yes: a learned latent curve can be built as a 1D parameter (t) passed through a Fourier feature map, then through a small network to produce a 384-D embedding.

A simple form is:

[
\gamma(t) = \mathrm{MLP}\big([\sin(2\pi f_1 t), \cos(2\pi f_1 t), \dots, \sin(2\pi f_k t), \cos(2\pi f_k t)]\big)
]

with

[
\gamma(t)\in \mathbb{R}^{384}
]

If you want the curve itself to be Fourier-like, you can also write each output dimension as a sum of learned sinusoids:

[
z_j(t)=a_{j,0}+\sum_{m=1}^{k}\left(a_{j,m}\sin(2\pi f_m t)+b_{j,m}\cos(2\pi f_m t)\right)
]

for (j=1,\dots,384).

So the idea is:

  • Input: 1D coordinate (t)
  • Fourier transform / positional encoding: expand (t) into sinusoidal features
  • Learned map: combine those features into a smooth 384-D latent curve

If you want, I can turn this into a minimal PyTorch model.


User prompt 4 of 6 – 8/4/2026, 2:22:58 AM:
can this be used to improve model skills?

GPT-5.4 mini:
Yes. It can help if the 1D variable is a meaningful control signal or latent axis, because Fourier features let the model represent smooth and periodic structure more easily.

It’s useful for:

  • Encoding position or time in a way a model can learn from quickly
  • Learning smooth curves in latent space
  • Capturing periodic patterns like cycles, rhythms, or oscillations
  • Improving interpolation between known states

But it won’t automatically make a model “smarter.” It helps most when the underlying pattern really has low-dimensional structure. If the task is highly complex and not well-approximated by a 1D manifold, a 1D latent curve will be too restrictive.

Rule of thumb: use it when you want the model to learn a structured path through a high-dimensional space, not when you need full expressive power.

If you want, I can suggest where this works well in practice, like embeddings, generators, or time-series models.


User prompt 5 of 6 – 8/4/2026, 2:23:29 AM:
I know it works in 2D play with that

GPT-5.4 mini:
Yes — in 2D you can make it much more intuitive.

A 1D parameter (t) can trace a curve in 2D:

[
\gamma(t) = (x(t), y(t))
]

With Fourier features, each coordinate can be a sum of sinusoids:

[
x(t)=a_0+\sum_{m=1}^{k}\big(a_m\sin(2\pi f_m t)+b_m\cos(2\pi f_m t)\big)
]

[
y(t)=c_0+\sum_{m=1}^{k}\big(c_m\sin(2\pi f_m t)+d_m\cos(2\pi f_m t)\big)
]

That gives you a smooth learned path in the plane.

What this means practically:

  • Simple curve: straight-ish if only low frequencies are used
  • Wavy curve: more frequencies add bends and loops
  • Closed shapes: periodic Fourier terms can form circles, spirals, petals, etc.
  • Learning: the model adjusts coefficients so the curve matches data or behavior

A nice mental model is:
1D time/control signal in → Fourier expansion → 2D trajectory out

If you want to “play” with it, start with:

[
x(t)=\sin(t), \quad y(t)=\cos(2t)
]

That already makes an interesting looping shape.

The Key in Your Pocket: Why yubiOS is Redefining Digital Sovereignty

Category:

Introduction: The Invisible Chains of Modern Computing

For the majority of users, the concept of “hardware ownership” is a technical illusion. While you might hold the physical chassis of your laptop, the ultimate “Root of Trust”—the cryptographic foundation that determines what the hardware is allowed to boot and which keys can unlock your data—remains a black box. In contemporary systems, this anchor is almost always the Trusted Platform Module (TPM), a chip soldered to the motherboard by an Original Equipment Manufacturer (OEM) and provisioned with vendor keys that the end-user never truly controls.

This creates a fundamental dependency: you are essentially renting trust from your manufacturer. If the platform firmware is compromised or a vendor’s supply chain is subverted, your “secure” system is built on cryptographic sand.

Enter yubiOS, a FIDO2-first immutable operating system designed to place the owner back in the trust chain. The core premise is a radical shift toward digital sovereignty: the YubiKey—not a soldered motherboard chip—serves as the anchor for everything from the initial boot sequence to disk encryption and administrative authorization. By exploring a “No OEM” architecture, yubiOS seeks to ensure that the primary trust boundary of your machine resides in a hardware security module (HSM) you can physically hold in your hand.

Takeaway 1: Your Hardware Security Module is the New Root of Trust

The defining architectural shift of yubiOS is the transition of the Root of Trust from a platform-bound TPM to a user-owned YubiKey 5 series device. This isn’t merely a replacement of components; it is a fundamental separation of Owner Identity from Platform Integrity.

In traditional models, secrets like disk encryption keys are “sealed” to the motherboard’s TPM. If the board is stolen, the secrets remain with the silicon. yubiOS flips this: the YubiKey gates the release of secrets, ensuring they travel with the user. By utilizing hardware-bound keys that require a physical tap, yubiOS prevents “silent decryption”—an attack where software or a remote actor interrogates a TPM without the user’s knowledge.

“No TPM. No OEM. No trust anchors you don’t control.”

While yubiOS minimizes dependency on the OEM-controlled TPM for secret storage, it doesn’t ignore platform evidence. On supported hardware, the system still utilizes the TPM (or the yubiOS-owned ARM64 fTPM) for measurement. This creates a dual-layered trust model: the TPM answers “Did the expected platform boot?” while the YubiKey answers “Is the authorized owner present?” By decoupling identity from the silicon, yubiOS ensures the owner remains the ultimate arbiter of the system.

Takeaway 2: Why ARM64 is the Primary Frontier for True Ownership

While yubiOS supports x86-64 as a secondary target, it identifies ARM64—specifically the RK3588 platform like the Radxa ROCK 5B—as the primary frontier for true sovereignty. The rationale is rooted in the transparency of the firmware stack. On x86 architectures, the firmware (UEFI/BIOS) and sub-systems like Intel ME or AMD PSP remain proprietary “black boxes” running at privilege levels higher than the OS.

ARM64 allows for what yubiOS calls a “Path A” provisioning story. This flagship ownership model enables the user to burn their own Root of Trust Public Key (ROTPK) into the silicon’s eFuses. This effectively grants the user control over the hardware from the very first instruction. This owner-provisioned stack includes:

  • TF-A (Trusted Firmware-A): Managing secure-world transitions.
  • OP-TEE: Providing a trusted execution environment for secure applications.
  • U-Boot: An open-source bootloader acting as the UEFI firmware provider.

By targeting platforms that support user-burned fuses, yubiOS moves away from “platform trust” and toward a system where the owner genuinely controls the firmware that initializes their machine.

Takeaway 3: Solving the “Brittle Boot” with FIDO2 hmac-secret

Conventional “measured boot” systems using TPM-based LUKS2 encryption are notoriously “brittle.” When keys are sealed to specific TPM PCR (Platform Configuration Register) hashes, any minor change—a kernel update, an initrd modification, or even a tweak to kernel arguments—invalidates the hash and prevents the disk from unlocking. This forces users into a perpetual cycle of manual recovery or key re-enrollment, a usability nightmare that often leads to security being disabled.

yubiOS solves this by utilizing the FIDO2 hmac-secret extension for LUKS2 disk encryption. Instead of binding secrets to volatile platform measurements, the encryption key is derived deterministically from the YubiKey via a credential ID and the user’s PIN.

The strategic win here is survivability. By separating the “possession” requirement from the specific “version” of the OS, yubiOS allows for atomic updates and kernel swaps without forcing the user to re-seal their keys. It makes a high-security, hardware-anchored system actually usable as a daily driver.

Takeaway 4: The Operating System as a Verifiable Container (bootc)

yubiOS abandons traditional, mutation-heavy package management in favor of the bootc model. The entire operating system is treated as an OCI-native (Open Container Initiative) image. This shift brings the determinism and verifiable integrity of modern microservices to the host OS.

By delivering the OS as a container image, yubiOS ensures that every deployment is identical to a known-good build state. This approach integrates:

  • SLSA Build Provenance: A verifiable trail of evidence for every component in the build.
  • SBOM (Software Bill of Materials): A comprehensive inventory of all libraries and tools included.
  • OCI Distribution: Updates are pulled atomically via bootc upgrade, ensuring that “configuration drift” is architecturally impossible.

Takeaway 5: Immutability is a Verifiable Chain, Not Just a “Read-Only” Flag

In yubiOS, immutability is cryptographically enforced, not just a file system attribute. The system treats the OS as a verifiable chain of integrity. While the mkosi build path utilizes dm-verity for fixed partition images, the primary bootc model achieves immutability through fs-verity-protected objects and EROFS metadata images.

This protection is anchored by a Sealed UKI (Unified Kernel Image). The kernel command line includes the composefs digest, which is signed as part of the UKI binary. This means the system directory (/usr) isn’t just read-only; it is verified against a Merkle tree on every single I/O operation.

“Every dlopen() and read from /usr… is validated against the Merkle tree. A modified library produces a hash mismatch → IO error.”

This architectural gate provides a hard block against library-poisoning attacks. If malware attempts to substitute a critical system file, the cryptographic mismatch results in an immediate I/O error, preventing the compromised code from ever executing.

Takeaway 6: Security That Demands Human Presence (The “Touch” Requirement)

The final layer of yubiOS security is the demand for physical human presence. Leveraging the systemd v261+ floor, yubiOS implements advanced hardening like ConditionSecurity=measured-os to gate sensitive services. Furthermore, by requiring pam-u2f >= 1.3.1 (specifically to mitigate the authentication bypasses seen in CVE-2025-23013), the OS ensures that privileged actions are gated by a physical tap.

Malware excels at automating administrative actions once it gains a foothold. In yubiOS, every sudo command, login, and SSH authentication (using ed25519-sk resident keys) requires a physical touch on the YubiKey. Because this “touch” cannot be synthesized by software, it turns the user from a passive observer into the active gatekeeper of the system. Even if an attacker captures a user’s PIN remotely, they cannot escalate privileges without physical possession of the hardware token.

Conclusion: The Future of Sovereign Computing

The yubiOS project serves as a proof-of-concept that the components for a fully sovereign, hardware-anchored Linux are now mature. The project is moving toward critical engineering milestones: Milestone F, which aims to prove the production “Path A” ownership story on Radxa ROCK 5B hardware, and Milestone Frost, which explores “Firmware-Assisted GPU Resource Lockout” using the Panfrost driver to quarantine rogue GPU workloads.

The project demonstrates that we no longer need to rely on the invisible, vendor-controlled anchors of the past to secure our digital lives. But it also leaves us with a vital question regarding our own hardware:

If you can’t hold your machine’s root of trust in your hand, do you really own your computer, or are you just renting it from the manufacturer?

Faux Phy… Phe Phum

Category:

Contribution for: https://github.com/yubi-OS

Link: https://gist.github.com/0mniteck/e92c74276333e43912a5baa6802fcbd4

VNDR (Qualcomm/qcom) attack chain

Step 1: Be an OEM or a software supplier in the vendors supplychain, toolchain, or open-source code; and have an interest in PAC (Program and Control). ie. [Absolute Persistence](https://www.absolute.com/platform/persistence) 600M+ Devices. Present with a mutable PCR4 (on almost every boot it changes). https://github.com/0mniteck/0mniteck/blob/1bbf6ad6627ae0cfd58c31ea1cf9d48c0ff9daa2/assets/pcr4.txt#L2-L3 Step 1-A: Start off by modifying the PM (power manager); reflash and add strange #PME*3-A enforcables on D0-2, D3hot, and D3cold to make debug and linux use an absolute nightmare. Allowing modification of any number of device/power/idle states (S0-S5). Take full advantage of the proprietary block microsoft has allowed in the open [design specs](https://github.com/MicrosoftDocs/windows-driver-docs/blob/staging/windows-driver-docs-pr/pci/pci-power-management-and-device-drivers.md#scenario-1-turning-off-a-device) of the #PME (power management event). > Noitice: [Pci-SIG](https://www.intel.com/content/www/us/en/developer/articles/news/acpica-news.html) states a change as of 2024 that allows full suspend in S3. Step 1-B: Presents with a grub lsacpi listing that has many unidentifiable ranges sandwiched between duplicate edk2 instances building a stacked UEFI; allowing evil-twins for any trusted UEFI data handed to the system. Use broken cpu hw implementation features such as Broken CNTVOFF_EL2, and Common not Private translations. > Background: What is CNTVOFF_EL2? CNTVOFF_EL2 is the Counter-timer Virtual Offset register in the ARMv8/ARM64 generic timer architecture. It defines the offset subtracted from the physical count to produce the virtual count seen at EL1/EL0: `CNTVCT_EL0 = physical count − CNTVOFF_EL2` https://github.com/0mniteck/0mniteck/blob/6c5acb2d39db482dbdd0eb4c6d18c89184a7f377/assets/long/journal-aa#L120 (Broken CNTVOFF_EL2) https://github.com/0mniteck/0mniteck/blob/6c5acb2d39db482dbdd0eb4c6d18c89184a7f377/assets/long/journal-aa#L163 (Primary clock source) https://github.com/0mniteck/0mniteck/blob/6c5acb2d39db482dbdd0eb4c6d18c89184a7f377/assets/long/journal-aa#L263 (Virtual clock source) > It’s primarily used so a hypervisor (running at EL2) can present a different/virtual notion of time to guests. When the kernel boots at EL2 or sets up virtualization, it normally relies on this register behaving correctly. Step 1-C: Use longstanding [CVE’s](https://access.redhat.com/security/vulnerabilities/RHSB-2026-003) like one from [V4bel/dirtyfrag](https://github.com/V4bel/dirtyfrag) to poison the cpu page_cache over and over. Internal qcom controlled hd(x) devices masked with bpf-restricted-fs; similar to exploits from [rphang/evilBPF](https://github.com/rphang/evilBPF) which hide a drive containing 91 gpt partitions where poisoned ESP/ACPI/.MBN files are stored. Step 2: Misuse open-source code meant to improve fw compatability for the purpose of transfering modified essential security and system processes code to back propagate intel through a service manager and collect device usage statistics. Step 2-A: Before systemd init, insert several modules with obfuscated names, which load using input manupulation where there is a particular escape pattern used to affect the visible and selected device tree nodes. For example `of:Nvisible-nameT(null)Cactual,name-visible-name` results in devicetree nodes, /sys, and /proc entries with the visible-name only. Devices such as replicator, sink, are funnel are present in the device tree suggesting arm,coresight is available post-production. https://github.com/0mniteck/0mniteck/blob/1bbf6ad6627ae0cfd58c31ea1cf9d48c0ff9daa2/assets/long/journal-ap#L755 https://github.com/0mniteck/0mniteck/blob/f203e0cbafc527bcbcdb8a3254c5907899776069/assets/long/journal-ah#L163 https://github.com/search?q=repo%3A0mniteck%2F0mniteck+%22T%28null%29C%22&type=code Step 2-B: Using the same `qcom,dload` to fw sideload a modified libselinux.so.1 and a modified libapparmor.so.1; before and after systemd inits, effectivley hijacking kernel and userspace security. Using fw sideload to open a modified libacl and modified libmount. Which intern mounts a /usr before systemd loads, then bind mounts /usr over /usr. Showing a journal entry of `null uuid / with multiple lower layers`. [Kernel_module#Blacklisting](https://wiki.archlinux.org/title/Kernel_module#Blacklisting) https://github.com/0mniteck/0mniteck/blob/6c5acb2d39db482dbdd0eb4c6d18c89184a7f377/assets/dmesg#L802 https://github.com/0mniteck/0mniteck/blob/1bbf6ad6627ae0cfd58c31ea1cf9d48c0ff9daa2/assets/long/journal-aa#L749 > Note: lib files are provided to the system by initrd or root, firmware will not usually attempt to modify or change vital system integrity files during critical stages of boot or shutdown. This would cause basic compatability issues with images, but certain configs on certain iso’s seem to boot, as they are still vulnerable to initrd interference. Step 2-C: In initrd during root-pivot systemd generators autorun from the poisoned /usr. It obfuscates the dmesg logs, flushes the journal coming from the pre-pivot, and uses a modified libmount to prevent nvme device discovery and rescans. Reinit by injecting cmdline into initrd to start a systemd pid controled by qcom. Block drive discovery aka gpt-auto, gpt-auto-force; clip /sys and /proc subdirectories to maintain control and use bpf-restrict-fs. Modify clock-timer paths to hide breakpoints/stdout. Step 3: During boot use cutmem and parttool to further obfuscate runtime access to true boot fs (normally blocked by secureboot). Load *faux* ACPI tables from a lzma compressed ACPI stored in hidden media under `(hd1,gpt42)/acpi/ACPI.lzma`. As well as use a *faux* remap tricking the TEE (Trusted execution environment) client in the OS into loading a modified TA (Trusted App) client tz.uefisecapp allowing a MitM for the secure world. Without the PCIe remap in memory it’s located in the hidden media aswell under `(hd1,gpt53)/tzapps/uefisecapp.mbn`. All disks on the device are mounted using an ACPI table memory region provided by the ACPI.lzma that is decompressed into memory at (re)boot using the stacked-edk2. Step 3-A: Modified endpoint tables handed to the system by the poisoned PM maps the cpu power manager event (#PME) to regions in memory it controls and shields using PAN (protected access never). #PME is then used to cause interrupts using the PCI-PM and a pwrhalt of the display adapter, or the PCIe controller of the boot media, then finally a reboot of the system. Triggered by an interrupt or “unapproved boot” for reboot into a modified S3 that qcom controls. Use sysinit_calls to trigger WATCHDOG and READY to signal status of boot_ok from initrd. And store reboot-reason@PID in nvmem devices with drivers nvmem_qcom_spmi_sdam, and nvmem_qfprom. On the same nvmem device there’s gpu-speed-bin@PID causing the gpu to run dangerously hot possibly as another limmiter/interrupt instructed by #PME enforcable D3hot. or: Step 3-B: Use hci_uart with btqcom to create a phy ethernet emulator. Use athk12 wifi driver fw load along with dummy power regulators in the modified devicetree; added in initrd as to maintain a tx rx path to a radio that isnt able to power off. Create `/dev/ttyHS` devices to route the secure console output to a secondary frame buffer. Then use the added systemd generators to disable the hw from connecting in userspace and attach the frame buffer with visible passwords in the output to the tx rx for service manager logging. Step 3-C: In the systemd runtime use generated services to block further probing of dmesg, kmesg, journalctl, /sys, and /proc scrubbing; as well as check dmesg for magic numbers given out by Cpuidle: PM to start service log collections, userspace sed filters, and open fd (file descriptors) from the parent pid it controls. PCRS read from PCR 4 are missing measurements for a misformatted \Fv()\FvFile()num named Fv()\ComputraceAgent suggesting further [Absolute Persistence](https://www.absolute.com/platform/persistence) is to blame here. https://github.com/0mniteck/0mniteck/blob/1bbf6ad6627ae0cfd58c31ea1cf9d48c0ff9daa2/assets/long/journal-ab#L3

Summary

The full chain describes a vendor-supplied boot compromise that starts in firmware/supply-chain components, survives through stacked UEFI, initrd, and systemd, then uses modified ACPI, device trees, kernel modules, and service generators to hide itself, block inspection, control power/reset behavior, and keep access to both boot media and secure-world interfaces. The end result is persistent control over boot, logging, device discovery, and system state, with PCR4/UEFI measurement gaps presented as evidence of tampering.

VNDR mitigations – https://github.com/yubi-OS

VNDR 1 - Evil vendor mitigation - Surface Laptop 7 (Qualcomm Fw/stacked-edk2)

GRUB_CMDLINE_LINUX_DEFAULT:/etc/default/grub
rd.hostonly module_blacklist=hci_uart,bluetooth,btqcom,pwrseq_qcom_wcn,autofs4,zfs,dmi_sysfs,nvmem_qcom_spmi_sdam,nvmem_qfprom,qcom\,dload sysctl.kernel.unprivileged_bpf_disabled=1 systemd.mask=pd-mapper cpuidle.off=1 cma=0 efi=noruntime clk_ignore_unused pd_ignore_unused console=tty0 console=ttyHS4

DRACUT_EXTRA_ARGS:~/.bash_aliases
--force --show-modules --hostonly --hostonly-mode strict --kernel-only --ro-mnt --no-early-microcode --reproducible --no-machineid --regenerate-all --add ' tpm2-tss ' --omit-drivers ' hci_uart bluetooth btqcom pwrseq_qcom_wcn autofs4 zfs dmi_sysfs nvmem_qcom_spmi_sdam nvmem_qfprom qcom\,dload '


VNDR 2 - 'Good' vendor mitigation - Surface Pro 7 (Intel Fw)

GRUB_CMDLINE_LINUX_DEFAULT:/etc/default/grub
rd.hostonly module_blacklist=i915,iwlwifi,autofs4,zfs,x86_pkg_temp_thermal,intel_pmc_core,intel_rapl_common sysctl.kernel.unprivileged_bpf_disabled=1 cpuidle.off=1 console=tty0 console=ttyS4

DRACUT_EXTRA_ARGS:~/.bash_aliases
--force --show-modules --hostonly --hostonly-mode strict --kernel-only --ro-mnt --no-early-microcode --reproducible --no-machineid --regenerate-all --add ' tpm2-tss ' --omit-drivers ' i915 iwlwifi autofs4 zfs x86_pkg_temp_thermal intel_pmc_core intel_rapl_common '


To debug add: rd.shell rd.debug rd.break

Hint: Try more than once and boot from an empty boot_current that leads back to fwsetup directly. Select your boot option from uefi after FULL power cycle (hold power till it turns off mid cycle and hold untill it starts back up), wait until it can’t find boot media, then boot to device from uefi menu.

Description

The mitigation section is basically a hardening recipe: remove or blacklist the drivers and firmware paths the chain depends on, disable unprivileged BPF, cut down power-management/runtime firmware behavior, and keep the initramfs/boot image minimal and reproducible.

Summary

In short: reduce the attack surface of the boot chain, block suspect modules, and prevent firmware or initrd-level tampering from loading or hiding itself.

v1.05 By: Shant Tchatalbachian (0mniteck)

Secure Time Arm Trustedzone

Category:

====================

User prompt 1 of 3 – 7/1/2026, 7:13:07 PM:
In arm64 is there a trusted zone clock source?

GPT-5.4 mini:
Considering ARMv8 Trusted Zone

I think the question might be about ARMv8 trusted zone and specifically related to “clock source.” It seems like I don’t need to check the web for this since it’s a technical topic that has enduring relevance. I want to keep my answer concise while mentioning secure world timers, which could be important in this context. Let’s get started on crafting that response!Yes—on ARM64 there can be a secure/“trusted” time source, but it depends on the SoC and firmware.

Typically:

  • Normal world uses the architectural generic timer.
  • Secure world (TrustZone) can use the same timer hardware with secure access, or a separate secure timer/clock source provided by the platform.
  • The architecture itself doesn’t mandate one single “trusted zone clock source”; the platform/firmware defines what secure timekeeping exists.

If you mean Linux/ARM64 specifically, the kernel usually exposes the generic timer, while secure-world timing is handled by firmware, secure monitor, or vendor-specific hardware.

If you want, I can explain the ARMv8 timer architecture and how TrustZone access control works.


User prompt 2 of 3 – 7/1/2026, 7:16:23 PM:
Yes in the context of rk3399, and rk3588 running u-boot optee-os and arm trusted firmware

GPT-5.4 mini:
Evaluating secure timer source

I need to provide a concise answer. It seems the likely secure timer source is CNTPCT, rather than a separate trusted zone clock. I should also mention that both RK3399 and RK3588 are supported platforms for this secure time source configuration. When crafting my response, I’ll ensure to include the necessary citations to back up my statements. This way, I can make sure the information is reliable and well-supported!Yes: on RK3399 and RK3588 the usual “trusted” time source in OP-TEE is the ARM generic timer counter, typically CNTPCT, exposed via CFG_SECURE_TIME_SOURCE_CNTPCT. OP-TEE’s porting guide says a fully trustable platform should use a secure clock for tee_time_get_sys_time() / tee_time_get_ta_time(), but it’s also OK to fall back to REE time if the hardware/platform doesn’t provide one.

So in practice:

  • Secure world time: often the generic timer counter, read from secure world
  • No special TrustZone-only clock mandated by ARM
  • If you need higher trust, the platform must provide a real secure clock path; otherwise OP-TEE uses the counter/REE time model depending on the port.

For RK3399/RK3588 specifically, this is the normal setup in OP-TEE ports, and both platforms are supported.

If you want, I can show where this is wired in TF-A/OP-TEE for RK3399 vs RK3588.


User prompt 3 of 3 – 7/1/2026, 7:26:37 PM:
Yes

GPT-5.4 mini:
Searching for citations

I see that I need a factual answer with citations from web search results, but I can’t see citation sources 3 and 10. It seems like a good idea to conduct a targeted search to find the necessary information. I’ll focus on ensuring that I gather reliable data to support my response, as it’s important to have accurate references when discussing real-world topics. Let’s get started on that search!Searching for TF-A/OP-TEE info

I need to find a concise answer regarding the wiring for TF-A/OP-TEE on rk3399/rk3588. I should look into the OP-TEE config in platform conf.mk and also check timer_a64.c. It seems like reading the documentation on porting guidelines would be helpful too. So, I’ll search for timer_a64.c in relation to rk3399/rk3588, possibly on GitHub to find the source code or any related details.Looking into secure clock support

I need an answer that likely comes from the documentation. It might be useful to mention specific files that aren’t board-specific. In OP-TEE, I know the secure clock support is found in core/arch/arm/kernel/timer_a64.c for AArch64 builds, and the board configuration activates CFG_SECURE_TIME_SOURCE_CNTPCT in the platform conf.mk. I should provide a source from the docs that illustrates the config option and the secure clock concept to answer comprehensively.On both RK3399 and RK3588, the usual wiring is the same:

  • TF-A provides the EL3 monitor/secure monitor path for switching worlds.
  • OP-TEE is configured to use the secure generic timer counter as its secure time source, usually via CFG_SECURE_TIME_SOURCE_CNTPCT=y.
  • The actual AArch64 timer code path is in OP-TEE’s core/arch/arm/kernel/timer_a64.c for secure-world timer handling. The porting docs explicitly show CFG_SECURE_TIME_SOURCE_CNTPCT as the platform setting for the secure time source, and they describe that a real secure clock is optional but preferred for tee_time_get_sys_time() / tee_time_get_ta_time().

So the short answer is: yes, but it’s not a separate RK3399/RK3588 “TrustZone clock”. It’s typically the ARM generic timer counter exposed to secure world, with the platform choosing whether to treat it as the secure time source.

If you want to verify it in your tree, look for:

  • CFG_SECURE_TIME_SOURCE_CNTPCT in the board/platform conf.mk
  • core/arch/arm/kernel/timer_a64.c
  • TF-A build using SPD=opteed on RK3588 (and the equivalent RK3399 platform port)