The Key in Your Pocket: Why yubiOS is Redefining Digital Sovereignty

Category:

Introduction: The Invisible Chains of Modern Computing

For the majority of users, the concept of “hardware ownership” is a technical illusion. While you might hold the physical chassis of your laptop, the ultimate “Root of Trust”—the cryptographic foundation that determines what the hardware is allowed to boot and which keys can unlock your data—remains a black box. In contemporary systems, this anchor is almost always the Trusted Platform Module (TPM), a chip soldered to the motherboard by an Original Equipment Manufacturer (OEM) and provisioned with vendor keys that the end-user never truly controls.

This creates a fundamental dependency: you are essentially renting trust from your manufacturer. If the platform firmware is compromised or a vendor’s supply chain is subverted, your “secure” system is built on cryptographic sand.

Enter yubiOS, a FIDO2-first immutable operating system designed to place the owner back in the trust chain. The core premise is a radical shift toward digital sovereignty: the YubiKey—not a soldered motherboard chip—serves as the anchor for everything from the initial boot sequence to disk encryption and administrative authorization. By exploring a “No OEM” architecture, yubiOS seeks to ensure that the primary trust boundary of your machine resides in a hardware security module (HSM) you can physically hold in your hand.

Takeaway 1: Your Hardware Security Module is the New Root of Trust

The defining architectural shift of yubiOS is the transition of the Root of Trust from a platform-bound TPM to a user-owned YubiKey 5 series device. This isn’t merely a replacement of components; it is a fundamental separation of Owner Identity from Platform Integrity.

In traditional models, secrets like disk encryption keys are “sealed” to the motherboard’s TPM. If the board is stolen, the secrets remain with the silicon. yubiOS flips this: the YubiKey gates the release of secrets, ensuring they travel with the user. By utilizing hardware-bound keys that require a physical tap, yubiOS prevents “silent decryption”—an attack where software or a remote actor interrogates a TPM without the user’s knowledge.

“No TPM. No OEM. No trust anchors you don’t control.”

While yubiOS minimizes dependency on the OEM-controlled TPM for secret storage, it doesn’t ignore platform evidence. On supported hardware, the system still utilizes the TPM (or the yubiOS-owned ARM64 fTPM) for measurement. This creates a dual-layered trust model: the TPM answers “Did the expected platform boot?” while the YubiKey answers “Is the authorized owner present?” By decoupling identity from the silicon, yubiOS ensures the owner remains the ultimate arbiter of the system.

Takeaway 2: Why ARM64 is the Primary Frontier for True Ownership

While yubiOS supports x86-64 as a secondary target, it identifies ARM64—specifically the RK3588 platform like the Radxa ROCK 5B—as the primary frontier for true sovereignty. The rationale is rooted in the transparency of the firmware stack. On x86 architectures, the firmware (UEFI/BIOS) and sub-systems like Intel ME or AMD PSP remain proprietary “black boxes” running at privilege levels higher than the OS.

ARM64 allows for what yubiOS calls a “Path A” provisioning story. This flagship ownership model enables the user to burn their own Root of Trust Public Key (ROTPK) into the silicon’s eFuses. This effectively grants the user control over the hardware from the very first instruction. This owner-provisioned stack includes:

  • TF-A (Trusted Firmware-A): Managing secure-world transitions.
  • OP-TEE: Providing a trusted execution environment for secure applications.
  • U-Boot: An open-source bootloader acting as the UEFI firmware provider.

By targeting platforms that support user-burned fuses, yubiOS moves away from “platform trust” and toward a system where the owner genuinely controls the firmware that initializes their machine.

Takeaway 3: Solving the “Brittle Boot” with FIDO2 hmac-secret

Conventional “measured boot” systems using TPM-based LUKS2 encryption are notoriously “brittle.” When keys are sealed to specific TPM PCR (Platform Configuration Register) hashes, any minor change—a kernel update, an initrd modification, or even a tweak to kernel arguments—invalidates the hash and prevents the disk from unlocking. This forces users into a perpetual cycle of manual recovery or key re-enrollment, a usability nightmare that often leads to security being disabled.

yubiOS solves this by utilizing the FIDO2 hmac-secret extension for LUKS2 disk encryption. Instead of binding secrets to volatile platform measurements, the encryption key is derived deterministically from the YubiKey via a credential ID and the user’s PIN.

The strategic win here is survivability. By separating the “possession” requirement from the specific “version” of the OS, yubiOS allows for atomic updates and kernel swaps without forcing the user to re-seal their keys. It makes a high-security, hardware-anchored system actually usable as a daily driver.

Takeaway 4: The Operating System as a Verifiable Container (bootc)

yubiOS abandons traditional, mutation-heavy package management in favor of the bootc model. The entire operating system is treated as an OCI-native (Open Container Initiative) image. This shift brings the determinism and verifiable integrity of modern microservices to the host OS.

By delivering the OS as a container image, yubiOS ensures that every deployment is identical to a known-good build state. This approach integrates:

  • SLSA Build Provenance: A verifiable trail of evidence for every component in the build.
  • SBOM (Software Bill of Materials): A comprehensive inventory of all libraries and tools included.
  • OCI Distribution: Updates are pulled atomically via bootc upgrade, ensuring that “configuration drift” is architecturally impossible.

Takeaway 5: Immutability is a Verifiable Chain, Not Just a “Read-Only” Flag

In yubiOS, immutability is cryptographically enforced, not just a file system attribute. The system treats the OS as a verifiable chain of integrity. While the mkosi build path utilizes dm-verity for fixed partition images, the primary bootc model achieves immutability through fs-verity-protected objects and EROFS metadata images.

This protection is anchored by a Sealed UKI (Unified Kernel Image). The kernel command line includes the composefs digest, which is signed as part of the UKI binary. This means the system directory (/usr) isn’t just read-only; it is verified against a Merkle tree on every single I/O operation.

“Every dlopen() and read from /usr… is validated against the Merkle tree. A modified library produces a hash mismatch → IO error.”

This architectural gate provides a hard block against library-poisoning attacks. If malware attempts to substitute a critical system file, the cryptographic mismatch results in an immediate I/O error, preventing the compromised code from ever executing.

Takeaway 6: Security That Demands Human Presence (The “Touch” Requirement)

The final layer of yubiOS security is the demand for physical human presence. Leveraging the systemd v261+ floor, yubiOS implements advanced hardening like ConditionSecurity=measured-os to gate sensitive services. Furthermore, by requiring pam-u2f >= 1.3.1 (specifically to mitigate the authentication bypasses seen in CVE-2025-23013), the OS ensures that privileged actions are gated by a physical tap.

Malware excels at automating administrative actions once it gains a foothold. In yubiOS, every sudo command, login, and SSH authentication (using ed25519-sk resident keys) requires a physical touch on the YubiKey. Because this “touch” cannot be synthesized by software, it turns the user from a passive observer into the active gatekeeper of the system. Even if an attacker captures a user’s PIN remotely, they cannot escalate privileges without physical possession of the hardware token.

Conclusion: The Future of Sovereign Computing

The yubiOS project serves as a proof-of-concept that the components for a fully sovereign, hardware-anchored Linux are now mature. The project is moving toward critical engineering milestones: Milestone F, which aims to prove the production “Path A” ownership story on Radxa ROCK 5B hardware, and Milestone Frost, which explores “Firmware-Assisted GPU Resource Lockout” using the Panfrost driver to quarantine rogue GPU workloads.

The project demonstrates that we no longer need to rely on the invisible, vendor-controlled anchors of the past to secure our digital lives. But it also leaves us with a vital question regarding our own hardware:

If you can’t hold your machine’s root of trust in your hand, do you really own your computer, or are you just renting it from the manufacturer?

Faux Phy… Phe Phum

Category:

Contribution for: https://github.com/yubi-OS

Link: https://gist.github.com/0mniteck/e92c74276333e43912a5baa6802fcbd4

VNDR (Qualcomm/qcom) attack chain

Step 1: Be an OEM or a software supplier in the vendors supplychain, toolchain, or open-source code; and have an interest in PAC (Program and Control). ie. [Absolute Persistence](https://www.absolute.com/platform/persistence) 600M+ Devices. Present with a mutable PCR4 (on almost every boot it changes). https://github.com/0mniteck/0mniteck/blob/1bbf6ad6627ae0cfd58c31ea1cf9d48c0ff9daa2/assets/pcr4.txt#L2-L3 Step 1-A: Start off by modifying the PM (power manager); reflash and add strange #PME*3-A enforcables on D0-2, D3hot, and D3cold to make debug and linux use an absolute nightmare. Allowing modification of any number of device/power/idle states (S0-S5). Take full advantage of the proprietary block microsoft has allowed in the open [design specs](https://github.com/MicrosoftDocs/windows-driver-docs/blob/staging/windows-driver-docs-pr/pci/pci-power-management-and-device-drivers.md#scenario-1-turning-off-a-device) of the #PME (power management event). > Noitice: [Pci-SIG](https://www.intel.com/content/www/us/en/developer/articles/news/acpica-news.html) states a change as of 2024 that allows full suspend in S3. Step 1-B: Presents with a grub lsacpi listing that has many unidentifiable ranges sandwiched between duplicate edk2 instances building a stacked UEFI; allowing evil-twins for any trusted UEFI data handed to the system. Use broken cpu hw implementation features such as Broken CNTVOFF_EL2, and Common not Private translations. > Background: What is CNTVOFF_EL2? CNTVOFF_EL2 is the Counter-timer Virtual Offset register in the ARMv8/ARM64 generic timer architecture. It defines the offset subtracted from the physical count to produce the virtual count seen at EL1/EL0: `CNTVCT_EL0 = physical count − CNTVOFF_EL2` https://github.com/0mniteck/0mniteck/blob/6c5acb2d39db482dbdd0eb4c6d18c89184a7f377/assets/long/journal-aa#L120 (Broken CNTVOFF_EL2) https://github.com/0mniteck/0mniteck/blob/6c5acb2d39db482dbdd0eb4c6d18c89184a7f377/assets/long/journal-aa#L163 (Primary clock source) https://github.com/0mniteck/0mniteck/blob/6c5acb2d39db482dbdd0eb4c6d18c89184a7f377/assets/long/journal-aa#L263 (Virtual clock source) > It’s primarily used so a hypervisor (running at EL2) can present a different/virtual notion of time to guests. When the kernel boots at EL2 or sets up virtualization, it normally relies on this register behaving correctly. Step 1-C: Use longstanding [CVE’s](https://access.redhat.com/security/vulnerabilities/RHSB-2026-003) like one from [V4bel/dirtyfrag](https://github.com/V4bel/dirtyfrag) to poison the cpu page_cache over and over. Internal qcom controlled hd(x) devices masked with bpf-restricted-fs; similar to exploits from [rphang/evilBPF](https://github.com/rphang/evilBPF) which hide a drive containing 91 gpt partitions where poisoned ESP/ACPI/.MBN files are stored. Step 2: Misuse open-source code meant to improve fw compatability for the purpose of transfering modified essential security and system processes code to back propagate intel through a service manager and collect device usage statistics. Step 2-A: Before systemd init, insert several modules with obfuscated names, which load using input manupulation where there is a particular escape pattern used to affect the visible and selected device tree nodes. For example `of:Nvisible-nameT(null)Cactual,name-visible-name` results in devicetree nodes, /sys, and /proc entries with the visible-name only. Devices such as replicator, sink, are funnel are present in the device tree suggesting arm,coresight is available post-production. https://github.com/0mniteck/0mniteck/blob/1bbf6ad6627ae0cfd58c31ea1cf9d48c0ff9daa2/assets/long/journal-ap#L755 https://github.com/0mniteck/0mniteck/blob/f203e0cbafc527bcbcdb8a3254c5907899776069/assets/long/journal-ah#L163 https://github.com/search?q=repo%3A0mniteck%2F0mniteck+%22T%28null%29C%22&type=code Step 2-B: Using the same `qcom,dload` to fw sideload a modified libselinux.so.1 and a modified libapparmor.so.1; before and after systemd inits, effectivley hijacking kernel and userspace security. Using fw sideload to open a modified libacl and modified libmount. Which intern mounts a /usr before systemd loads, then bind mounts /usr over /usr. Showing a journal entry of `null uuid / with multiple lower layers`. [Kernel_module#Blacklisting](https://wiki.archlinux.org/title/Kernel_module#Blacklisting) https://github.com/0mniteck/0mniteck/blob/6c5acb2d39db482dbdd0eb4c6d18c89184a7f377/assets/dmesg#L802 https://github.com/0mniteck/0mniteck/blob/1bbf6ad6627ae0cfd58c31ea1cf9d48c0ff9daa2/assets/long/journal-aa#L749 > Note: lib files are provided to the system by initrd or root, firmware will not usually attempt to modify or change vital system integrity files during critical stages of boot or shutdown. This would cause basic compatability issues with images, but certain configs on certain iso’s seem to boot, as they are still vulnerable to initrd interference. Step 2-C: In initrd during root-pivot systemd generators autorun from the poisoned /usr. It obfuscates the dmesg logs, flushes the journal coming from the pre-pivot, and uses a modified libmount to prevent nvme device discovery and rescans. Reinit by injecting cmdline into initrd to start a systemd pid controled by qcom. Block drive discovery aka gpt-auto, gpt-auto-force; clip /sys and /proc subdirectories to maintain control and use bpf-restrict-fs. Modify clock-timer paths to hide breakpoints/stdout. Step 3: During boot use cutmem and parttool to further obfuscate runtime access to true boot fs (normally blocked by secureboot). Load *faux* ACPI tables from a lzma compressed ACPI stored in hidden media under `(hd1,gpt42)/acpi/ACPI.lzma`. As well as use a *faux* remap tricking the TEE (Trusted execution environment) client in the OS into loading a modified TA (Trusted App) client tz.uefisecapp allowing a MitM for the secure world. Without the PCIe remap in memory it’s located in the hidden media aswell under `(hd1,gpt53)/tzapps/uefisecapp.mbn`. All disks on the device are mounted using an ACPI table memory region provided by the ACPI.lzma that is decompressed into memory at (re)boot using the stacked-edk2. Step 3-A: Modified endpoint tables handed to the system by the poisoned PM maps the cpu power manager event (#PME) to regions in memory it controls and shields using PAN (protected access never). #PME is then used to cause interrupts using the PCI-PM and a pwrhalt of the display adapter, or the PCIe controller of the boot media, then finally a reboot of the system. Triggered by an interrupt or “unapproved boot” for reboot into a modified S3 that qcom controls. Use sysinit_calls to trigger WATCHDOG and READY to signal status of boot_ok from initrd. And store reboot-reason@PID in nvmem devices with drivers nvmem_qcom_spmi_sdam, and nvmem_qfprom. On the same nvmem device there’s gpu-speed-bin@PID causing the gpu to run dangerously hot possibly as another limmiter/interrupt instructed by #PME enforcable D3hot. or: Step 3-B: Use hci_uart with btqcom to create a phy ethernet emulator. Use athk12 wifi driver fw load along with dummy power regulators in the modified devicetree; added in initrd as to maintain a tx rx path to a radio that isnt able to power off. Create `/dev/ttyHS` devices to route the secure console output to a secondary frame buffer. Then use the added systemd generators to disable the hw from connecting in userspace and attach the frame buffer with visible passwords in the output to the tx rx for service manager logging. Step 3-C: In the systemd runtime use generated services to block further probing of dmesg, kmesg, journalctl, /sys, and /proc scrubbing; as well as check dmesg for magic numbers given out by Cpuidle: PM to start service log collections, userspace sed filters, and open fd (file descriptors) from the parent pid it controls. PCRS read from PCR 4 are missing measurements for a misformatted \Fv()\FvFile()num named Fv()\ComputraceAgent suggesting further [Absolute Persistence](https://www.absolute.com/platform/persistence) is to blame here. https://github.com/0mniteck/0mniteck/blob/1bbf6ad6627ae0cfd58c31ea1cf9d48c0ff9daa2/assets/long/journal-ab#L3

Summary

The full chain describes a vendor-supplied boot compromise that starts in firmware/supply-chain components, survives through stacked UEFI, initrd, and systemd, then uses modified ACPI, device trees, kernel modules, and service generators to hide itself, block inspection, control power/reset behavior, and keep access to both boot media and secure-world interfaces. The end result is persistent control over boot, logging, device discovery, and system state, with PCR4/UEFI measurement gaps presented as evidence of tampering.

VNDR mitigations – https://github.com/yubi-OS

VNDR 1 - Evil vendor mitigation - Surface Laptop 7 (Qualcomm Fw/stacked-edk2)

GRUB_CMDLINE_LINUX_DEFAULT:/etc/default/grub
rd.hostonly module_blacklist=hci_uart,bluetooth,btqcom,pwrseq_qcom_wcn,autofs4,zfs,dmi_sysfs,nvmem_qcom_spmi_sdam,nvmem_qfprom,qcom\,dload sysctl.kernel.unprivileged_bpf_disabled=1 systemd.mask=pd-mapper cpuidle.off=1 cma=0 efi=noruntime clk_ignore_unused pd_ignore_unused console=tty0 console=ttyHS4

DRACUT_EXTRA_ARGS:~/.bash_aliases
--force --show-modules --hostonly --hostonly-mode strict --kernel-only --ro-mnt --no-early-microcode --reproducible --no-machineid --regenerate-all --add ' tpm2-tss ' --omit-drivers ' hci_uart bluetooth btqcom pwrseq_qcom_wcn autofs4 zfs dmi_sysfs nvmem_qcom_spmi_sdam nvmem_qfprom qcom\,dload '


VNDR 2 - 'Good' vendor mitigation - Surface Pro 7 (Intel Fw)

GRUB_CMDLINE_LINUX_DEFAULT:/etc/default/grub
rd.hostonly module_blacklist=i915,iwlwifi,autofs4,zfs,x86_pkg_temp_thermal,intel_pmc_core,intel_rapl_common sysctl.kernel.unprivileged_bpf_disabled=1 cpuidle.off=1 console=tty0 console=ttyS4

DRACUT_EXTRA_ARGS:~/.bash_aliases
--force --show-modules --hostonly --hostonly-mode strict --kernel-only --ro-mnt --no-early-microcode --reproducible --no-machineid --regenerate-all --add ' tpm2-tss ' --omit-drivers ' i915 iwlwifi autofs4 zfs x86_pkg_temp_thermal intel_pmc_core intel_rapl_common '


To debug add: rd.shell rd.debug rd.break

Hint: Try more than once and boot from an empty boot_current that leads back to fwsetup directly. Select your boot option from uefi after FULL power cycle (hold power till it turns off mid cycle and hold untill it starts back up), wait until it can’t find boot media, then boot to device from uefi menu.

Description

The mitigation section is basically a hardening recipe: remove or blacklist the drivers and firmware paths the chain depends on, disable unprivileged BPF, cut down power-management/runtime firmware behavior, and keep the initramfs/boot image minimal and reproducible.

Summary

In short: reduce the attack surface of the boot chain, block suspect modules, and prevent firmware or initrd-level tampering from loading or hiding itself.

v1.05 By: Shant Tchatalbachian (0mniteck)

Secure Time Arm Trustedzone

Category:

====================

User prompt 1 of 3 – 7/1/2026, 7:13:07 PM:
In arm64 is there a trusted zone clock source?

GPT-5.4 mini:
Considering ARMv8 Trusted Zone

I think the question might be about ARMv8 trusted zone and specifically related to “clock source.” It seems like I don’t need to check the web for this since it’s a technical topic that has enduring relevance. I want to keep my answer concise while mentioning secure world timers, which could be important in this context. Let’s get started on crafting that response!Yes—on ARM64 there can be a secure/“trusted” time source, but it depends on the SoC and firmware.

Typically:

  • Normal world uses the architectural generic timer.
  • Secure world (TrustZone) can use the same timer hardware with secure access, or a separate secure timer/clock source provided by the platform.
  • The architecture itself doesn’t mandate one single “trusted zone clock source”; the platform/firmware defines what secure timekeeping exists.

If you mean Linux/ARM64 specifically, the kernel usually exposes the generic timer, while secure-world timing is handled by firmware, secure monitor, or vendor-specific hardware.

If you want, I can explain the ARMv8 timer architecture and how TrustZone access control works.


User prompt 2 of 3 – 7/1/2026, 7:16:23 PM:
Yes in the context of rk3399, and rk3588 running u-boot optee-os and arm trusted firmware

GPT-5.4 mini:
Evaluating secure timer source

I need to provide a concise answer. It seems the likely secure timer source is CNTPCT, rather than a separate trusted zone clock. I should also mention that both RK3399 and RK3588 are supported platforms for this secure time source configuration. When crafting my response, I’ll ensure to include the necessary citations to back up my statements. This way, I can make sure the information is reliable and well-supported!Yes: on RK3399 and RK3588 the usual “trusted” time source in OP-TEE is the ARM generic timer counter, typically CNTPCT, exposed via CFG_SECURE_TIME_SOURCE_CNTPCT. OP-TEE’s porting guide says a fully trustable platform should use a secure clock for tee_time_get_sys_time() / tee_time_get_ta_time(), but it’s also OK to fall back to REE time if the hardware/platform doesn’t provide one.

So in practice:

  • Secure world time: often the generic timer counter, read from secure world
  • No special TrustZone-only clock mandated by ARM
  • If you need higher trust, the platform must provide a real secure clock path; otherwise OP-TEE uses the counter/REE time model depending on the port.

For RK3399/RK3588 specifically, this is the normal setup in OP-TEE ports, and both platforms are supported.

If you want, I can show where this is wired in TF-A/OP-TEE for RK3399 vs RK3588.


User prompt 3 of 3 – 7/1/2026, 7:26:37 PM:
Yes

GPT-5.4 mini:
Searching for citations

I see that I need a factual answer with citations from web search results, but I can’t see citation sources 3 and 10. It seems like a good idea to conduct a targeted search to find the necessary information. I’ll focus on ensuring that I gather reliable data to support my response, as it’s important to have accurate references when discussing real-world topics. Let’s get started on that search!Searching for TF-A/OP-TEE info

I need to find a concise answer regarding the wiring for TF-A/OP-TEE on rk3399/rk3588. I should look into the OP-TEE config in platform conf.mk and also check timer_a64.c. It seems like reading the documentation on porting guidelines would be helpful too. So, I’ll search for timer_a64.c in relation to rk3399/rk3588, possibly on GitHub to find the source code or any related details.Looking into secure clock support

I need an answer that likely comes from the documentation. It might be useful to mention specific files that aren’t board-specific. In OP-TEE, I know the secure clock support is found in core/arch/arm/kernel/timer_a64.c for AArch64 builds, and the board configuration activates CFG_SECURE_TIME_SOURCE_CNTPCT in the platform conf.mk. I should provide a source from the docs that illustrates the config option and the secure clock concept to answer comprehensively.On both RK3399 and RK3588, the usual wiring is the same:

  • TF-A provides the EL3 monitor/secure monitor path for switching worlds.
  • OP-TEE is configured to use the secure generic timer counter as its secure time source, usually via CFG_SECURE_TIME_SOURCE_CNTPCT=y.
  • The actual AArch64 timer code path is in OP-TEE’s core/arch/arm/kernel/timer_a64.c for secure-world timer handling. The porting docs explicitly show CFG_SECURE_TIME_SOURCE_CNTPCT as the platform setting for the secure time source, and they describe that a real secure clock is optional but preferred for tee_time_get_sys_time() / tee_time_get_ta_time().

So the short answer is: yes, but it’s not a separate RK3399/RK3588 “TrustZone clock”. It’s typically the ARM generic timer counter exposed to secure world, with the platform choosing whether to treat it as the secure time source.

If you want to verify it in your tree, look for:

  • CFG_SECURE_TIME_SOURCE_CNTPCT in the board/platform conf.mk
  • core/arch/arm/kernel/timer_a64.c
  • TF-A build using SPD=opteed on RK3588 (and the equivalent RK3399 platform port)

Find a way to restrict gpu usage by a kernel feature/component

Category:

====================

User prompt 1 of 20 – 7/1/2026, 6:06:52 PM:
Find a way to restrict gpu usage by a kernel feature/component

GPT-5.4 mini:
Searching for GPU restrictions

I see that the user is asking about a Linux kernel feature or component to restrict GPU usage. It sounds like they’re looking for a practical solution, so I should clarify what they mean by “find a way.” I think it might be useful to consider options like cgroups or DRM leasing. I’ll go ahead and perform a web search to gather the most current information on this topic.Searching for GPU usage limits

It seems there isn’t a kernel feature to directly limit GPU usage with cgroups. Instead, I’d need to look at the devices cgroup to restrict access rather than usage. I’m also considering options like DRM or KVM here. I need to mention scheduling and containerization as part of this context. I should pull in relevant citations from search results and refer to the kernel documentation for devices cgroup to provide more clarity.Considering GPU resource limits

I need to provide a clear answer about limiting compute usage for GPUs. It looks like the suggestion is to use devices cgroup or MIG for NVIDIA GPUs, as there isn’t a general kernel feature available for limiting GPU compute usage right now. I could reference ThinLinc’s cgroups, which currently don’t support GPU limits, and mention that a patch has been proposed for future GPU time-sharing. I want to keep this concise and focused!There’s no general in-kernel GPU quota controller you can turn on today. On Linux, cgroups can restrict access to GPU device nodes via the devices controller, but that’s device access, not GPU compute/time limiting; one kernel discussion even proposed a future GPU controller with memory and runtime accounting because GPU time sharing was still future work.

Practical options:

  • Block/allow GPU devices with cgroups or systemd device policies.
  • Partition the GPU in hardware if your cards support it, e.g. NVIDIA MIG.
  • Use scheduler/container tooling to assign specific /dev/nvidia* devices per job, which is what many clusters do.

If you want, I can give you the exact setup for cgroups v2 + systemd or for NVIDIA MIG.


User prompt 2 of 20 – 7/1/2026, 6:12:47 PM:
Does firmware talk to or controll the gpu directly in any architecture

GPT-5.4 mini:
Considering architecture information

I’m thinking about providing an answer related to general architecture. It seems I don’t necessarily need the web since many real-world facts are timeless, even though some may have changed. But I wonder if using the web could give me the latest insights? Hm, maybe it’s not necessary for this topic. Regardless, I definitely want to keep my response concise and focused! Let’s see what I can share about architecture.Yes. In many systems, firmware can directly initialize, configure, power-manage, and sometimes even schedule parts of GPU operation.

Common cases:

  • PCs/laptops: system firmware (UEFI/BIOS) often sets up the PCIe device, power state, memory mapping, and option ROM/VBIOS handoff before the OS driver takes over.
  • Discrete GPUs: the GPU usually has its own VBIOS/firmware, which the host firmware may load or validate, and the GPU’s onboard microcontrollers often run firmware that handles power, clocks, security, and some command processing.
  • Integrated GPUs / SoCs: platform firmware can be more involved, since the GPU may share memory, clocks, and power rails with the rest of the chip.
  • Embedded/console/mobile systems: firmware commonly has very direct control over the GPU’s bring-up and power state.

So the short answer is: yes, in basically all modern architectures firmware talks to the GPU at least during boot and power management, and sometimes more directly through GPU microcode or embedded controllers.


User prompt 3 of 20 – 7/1/2026, 6:15:10 PM:
Can u-boot load such things for an rk3399 or rk3588 and would there be a way to extend it into the OS

GPT-5.4 mini:
Searching for firmware details

I need to find answers about U-Boot loading firmware specifically for rk3399 and rk3588, and how it extends into the operating system. It seems like I should perform a web search to gather the most up-to-date and factual specifics since my current knowledge might not be enough. Let’s see what I can discover about this topic to help clarify things!Yes—on RK3399 and RK3588, U-Boot can load the early boot pieces, and then the OS can take over the rest. For Rockchip boards, U-Boot commonly loads DRAM init code/TPL-SPL plus BL31 (ARM Trusted Firmware), and on RK3588 it also uses a TPL/DDR binary before handing off to U-Boot proper.

For GPU-related firmware, the usual pattern is:

  • U-Boot loads whatever early firmware the boot chain needs.
  • Linux loads the GPU driver and any GPU firmware blobs from /lib/firmware after boot.
  • If you want a custom handoff, you can package blobs into the initramfs or have U-Boot load them into RAM and pass them to Linux via reserved memory / DT, but Linux still needs driver support to actually consume them.

So: U-Boot can load such things, but it usually doesn’t “drive the GPU” for the whole system; it mostly boots it and then Linux handles the GPU. For RK3588 specifically, U-Boot can also apply DT fixups that disable or enable GPU/codec blocks based on SoC state before Linux starts.

If you want, I can sketch a concrete boot flow for RK3399 + Panfrost or RK3588 + Mali firmware.


User prompt 4 of 20 – 7/1/2026, 6:17:38 PM:
Yea and consider a how to incorporate a mechanism to let the OS trigger a gpu lockout on resource overconsumption in gpu memory

GPT-5.4 mini:
Yes — the clean way is to split it into boot-time setup and runtime enforcement.

For RK3399/RK3588, a workable design looks like this:

  1. U-Boot sets up the hardware boundary
  • load the normal boot firmware chain
  • reserve a small shared memory region for control/telemetry
  • mark GPU-related memory as reserved in the DT if needed
  • pass the GPU on to Linux normally
  1. Linux owns policy
  • the GPU driver tracks per-process or per-cgroup VRAM use
  • when usage crosses a threshold, the kernel triggers a “lockout” event
  • that event can be implemented in software first, then optionally forwarded to firmware
  1. Firmware/enforcer handles hard lockout
  • on trigger, firmware or a secure monitor:
    • stops new command submission
    • flushes or resets GPU queues
    • fences the offending context
    • optionally cuts clocks/power or gates the device
  • Linux then gets a fault/notification and can recover or kill the offender

The key point: don’t make firmware do accounting. Let Linux do accounting, and let firmware do the hard cutoff.

A practical mechanism would be:

  • Shared memory mailbox
  • Linux writes:
    • offender ID
    • current VRAM usage
    • requested action: warn, throttle, lockout, reset
  • firmware reads it and acts
  • Secure call / SMC
  • Linux calls into BL31/secure monitor to request GPU quarantine
  • this is better if you want the lockout to be harder for a compromised userspace process to bypass
  • IOMMU + context teardown
  • on lockout, revoke DMA mappings for that client
  • this prevents further VRAM access even if the process keeps running

For a GPU memory overuse policy, I’d use this escalation:

  • soft limit: throttle submission
  • hard limit: reject new allocations
  • violation: revoke mappings + kill GPU context
  • repeated violation: full GPU reset / power gate

If you want the most robust version, the OS should trigger the lockout, but the actual enforcement should happen below the normal driver path:

  • either in a secure monitor
  • or in a small always-on firmware component
  • or via IOMMU invalidation plus device reset

For Rockchip specifically, the most realistic implementation is usually:

  • Linux driver tracks usage
  • a small kernel module or driver hook issues the lockout
  • reset/power-gating is done through existing platform control paths

If you want, I can sketch a concrete RK3588 boot + lockout design with:

  • U-Boot changes
  • device tree nodes
  • Linux driver hooks
  • the message format for the lockout mailbox

User prompt 5 of 20 – 7/1/2026, 6:21:17 PM:
Yes

GPT-5.4 mini:
Creating a concrete sketch

I need to provide a concrete sketch without relying on the web. It seems real-world facts related to architecture might have shifts, but I should focus on what’s mostly accurate. Since I previously used the web for general info, I didn’t need to include citations, but now that’s not the case. It’s better to draft something based on practical architecture principles to ensure its reliability without needing fresh specifics.Here’s a concrete RK3588-style design.

Boot flow

  1. U-Boot
  • boots BL31 + U-Boot as usual
  • reserves a small “GPU control” shared-memory region
  • adds DT nodes for:
    • GPU device
    • reserved control page
    • reserved telemetry page
  • optionally marks a carveout for firmware-owned state
  1. Linux
  • GPU driver loads normally
  • a kernel component tracks GPU memory use per:
    • process
    • cgroup
    • DRM context
  • when a limit is crossed, it triggers a lockout request
  1. Enforcement path
  • kernel sends a secure call or writes a mailbox message
  • secure monitor / always-on firmware:
    • invalidates GPU context(s)
    • revokes IOMMU mappings
    • stops command submission
    • optionally resets or power-gates the GPU

Suggested control model

Use three levels:

  • soft limit: throttle submissions
  • hard limit: deny new allocations
  • lockout: revoke mappings and reset offending context

That gives you graceful behavior before the hammer falls.

Minimal mailbox format

Shared memory could be something like:

struct gpu_lockout_msg {
    u32 magic;
    u32 version;
    u32 action;      // 1=warn, 2=throttle, 3=lockout, 4=reset
    u32 pid;
    u32 cgroup_id;
    u64 vram_used;
    u64 vram_limit;
    u64 timestamp_ns;
};

Firmware or secure monitor reads this and acts.

Linux side

You’d want a kernel hook in one of these places:

  • DRM driver memory-allocate path
  • cgroup accounting path
  • IOMMU mapping path

Best option: hook allocation accounting in the GPU driver, because by the time DMA mappings are already live, you’re reacting too late.

Enforcement sequence

When over limit:

  1. stop accepting new GPU jobs from that context
  2. flush in-flight work
  3. unmap GPU buffers for that context
  4. invalidate IOMMU entries
  5. signal userspace with an error
  6. optionally reset GPU if the context misbehaves again

What U-Boot should do

U-Boot should not do policy. It should only:

  • reserve memory
  • pass device-tree metadata
  • ensure the firmware/secure world knows where the control block is
  • leave enforcement to Linux + secure monitor

Best implementation split

  • U-Boot: setup only
  • Linux driver: accounting + policy
  • secure monitor/firmware: hard lockout + reset

That keeps it maintainable and hard to bypass.

If you want, I can turn this into a device-tree sketch + kernel module skeleton next.


User prompt 6 of 20 – 7/1/2026, 6:24:33 PM:
Yes

GPT-5.4 mini:
Considering design requirements

It looks like the user wants an answer that involves code, and it seems I don’t need to access the web for this—it’s about design architecture, which is more of a general knowledge area. I can answer based on what I already know, rather than searching online. I’ll keep my response concise and focused on the design aspects. Let’s see what I can provide for that!Here’s a minimal sketch.

Device tree additions

reserved-memory {
    #address-cells = <2>;
    #size-cells = <2>;
    ranges;

    gpu_ctrl: gpu-ctrl@0 {
        reg = <0x0 0x3f000000 0x0 0x1000>;
        no-map;
    };
};

gpu-lockout {
    compatible = "vendor,gpu-lockout";
    memory-region = <&gpu_ctrl>;
    status = "okay";
};

Kernel-side flow

  • GPU driver keeps per-context VRAM accounting.
  • When usage exceeds limit, call a lockout helper.
  • Helper writes the mailbox and triggers an SMC or reset path.
struct gpu_lockout_msg {
    u32 magic;
    u32 version;
    u32 action;
    u32 pid;
    u64 vram_used;
    u64 vram_limit;
};

static void trigger_gpu_lockout(struct gpu_ctx *ctx, u64 used, u64 limit)
{
    struct gpu_lockout_msg *msg = ctrl_page;

    msg->magic = 0x47504c4b; /* GPLK */
    msg->version = 1;
    msg->action = 3; /* lockout */
    msg->pid = task_pid_nr(current);
    msg->vram_used = used;
    msg->vram_limit = limit;

    arm_smccc_smc(GPU_LOCKOUT_SMC, virt_to_phys(msg), 0, 0, 0, 0, 0, 0, &res);
}

Enforcement logic

In firmware or secure monitor:

  1. validate the request
  2. fence the offending GPU context
  3. revoke IOMMU mappings
  4. stop command submission
  5. optionally reset/power-gate GPU

Good kernel hook points

  • drm_gem_object_create() / buffer allocation path
  • GPU driver context submit path
  • cgroup accounting integration if you want policy per container

Practical recommendation

Start with:

  • software accounting in Linux
  • SMC-based hard lockout
  • IOMMU revoke + context reset

That’s the simplest version that can actually work.

If you want, I can write:

  • a real kernel module skeleton
  • or a Rockchip-specific implementation plan for RK3588

User prompt 7 of 20 – 7/1/2026, 8:21:39 PM:
Kernel module

GPT-5.4 mini:
Considering code skeleton needs

I need to focus on the user’s request for a kernel module skeleton. The instruction suggests using web search for real-world facts, but this seems like a timeless technical question. Given the context, I shouldn’t need to search the web for this. I’ll provide a concise code skeleton while ensuring it’s clear and useful for the user. I want to keep it straightforward and relevant without overcomplicating things.Here’s a minimal kernel-module skeleton for a GPU lockout notifier. It does the accounting trigger in kernel space, then calls into firmware via SMC.

// gpu_lockout.c
#include <linux/module.h>
#include <linux/kernel.h>
#include <linux/init.h>
#include <linux/fs.h>
#include <linux/uaccess.h>
#include <linux/miscdevice.h>
#include <linux/mutex.h>
#include <linux/mm.h>
#include <linux/sched.h>
#include <linux/arm-smccc.h>

#define GPU_LOCKOUT_SMC  0xC200FF01
#define MAGIC            0x47504C4B  /* "GPLK" */

struct gpu_lockout_msg {
    u32 magic;
    u32 version;
    u32 action;      /* 1=warn, 2=throttle, 3=lockout, 4=reset */
    u32 pid;
    u64 vram_used;
    u64 vram_limit;
    u64 reserved[2];
};

static void *ctrl_page;
static DEFINE_MUTEX(lockout_lock);

static void gpu_trigger_lockout(u64 used, u64 limit)
{
    struct arm_smccc_res res;
    struct gpu_lockout_msg *msg = ctrl_page;

    if (!msg)
        return;

    mutex_lock(&lockout_lock);

    msg->magic = MAGIC;
    msg->version = 1;
    msg->action = 3;
    msg->pid = task_pid_nr(current);
    msg->vram_used = used;
    msg->vram_limit = limit;

    arm_smccc_smc(GPU_LOCKOUT_SMC,
                  (u64)virt_to_phys(msg), 0, 0, 0, 0, 0, 0, &res);

    mutex_unlock(&lockout_lock);
}

/* Demo sysfs knob to simulate overuse */
static ssize_t trigger_store(struct device *dev,
                             struct device_attribute *attr,
                             const char *buf, size_t count)
{
    u64 used, limit;

    if (sscanf(buf, "%llu %llu", &used, &limit) == 2)
        gpu_trigger_lockout(used, limit);

    return count;
}
static DEVICE_ATTR_WO(trigger);

static struct attribute *gpu_attrs[] = {
    &dev_attr_trigger.attr,
    NULL,
};
ATTRIBUTE_GROUPS(gpu);

static struct miscdevice gpu_miscdev = {
    .minor = MISC_DYNAMIC_MINOR,
    .name  = "gpu_lockout",
    .groups = gpu_groups,
};

static int __init gpu_lockout_init(void)
{
    int ret;

    ctrl_page = (void *)__get_free_page(GFP_KERNEL | __GFP_ZERO);
    if (!ctrl_page)
        return -ENOMEM;

    ret = misc_register(&gpu_miscdev);
    if (ret) {
        free_page((unsigned long)ctrl_page);
        return ret;
    }

    pr_info("gpu_lockout: loaded\n");
    return 0;
}

static void __exit gpu_lockout_exit(void)
{
    misc_deregister(&gpu_miscdev);
    if (ctrl_page)
        free_page((unsigned long)ctrl_page);
    pr_info("gpu_lockout: unloaded\n");
}

module_init(gpu_lockout_init);
module_exit(gpu_lockout_exit);

MODULE_LICENSE("GPL");
MODULE_AUTHOR("you");
MODULE_DESCRIPTION("GPU lockout notifier");

How to use it:

  • load the module
  • write two numbers to /dev/gpu_lockout via the trigger sysfs attribute
  • it sends an SMC with a lockout request

Example:

echo "104857600 67108864" > /sys/class/misc/gpu_lockout/trigger

What’s missing for a real version:

  • hook into the actual GPU driver’s allocation path
  • track per-context or per-cgroup VRAM usage
  • replace the demo sysfs trigger with real accounting
  • use a real SMC ID and secure-world handler
  • add IOMMU revocation / context reset logic

If you want, I can turn this into a proper DRM-side hook for Panfrost or a cgroup-aware version.


User prompt 8 of 20 – 7/1/2026, 8:26:29 PM:
Cgroup-aware

GPT-5.4 mini:
Searching kernel module information

I need to provide an answer with a code skeleton, likely related to cgroup-aware kernel modules. Since this involves kernel APIs, it’s crucial to check for real-world facts that can change over time. While I could draw from my existing knowledge, it seems safer to look up the latest information. I might want to use a related search to ensure I get the most current data relevant to kernel programming.Considering cgroup modules

I need to provide an answer relating to a cgroup-aware kernel module, probably mentioning cgroup v2 and related concepts like class and css. I’m thinking about including illustrative code, perhaps utilizing task_css for membership, or maybe simpler with task_pgrp. I want to ensure the accuracy of the information. For a real module, I could mention cgroup_subsys_state and css. It’s important to keep it high-level and consider that kernel APIs may differ. I’ll also need to include citations regarding the cgroup v2 unified hierarchy.Use cgroup v2 and key the GPU quota off the task’s current cgroup; cgroup v2 gives you one unified hierarchy and each process belongs to one cgroup, which makes per-container enforcement much cleaner.

A practical module shape is:

  • userspace creates cgroups
  • your module reads the task’s cgroup
  • you keep VRAM accounting per cgroup
  • on overuse, you lock out that cgroup only

Minimal skeleton:

#include <linux/module.h>
#include <linux/kernel.h>
#include <linux/fs.h>
#include <linux/miscdevice.h>
#include <linux/mutex.h>
#include <linux/arm-smccc.h>
#include <linux/sched.h>
#include <linux/cgroup.h>

#define GPU_LOCKOUT_SMC 0xC200FF01
#define MAGIC 0x47504C4B

struct gpu_cg_state {
    struct cgroup *cg;
    u64 vram_used;
    u64 vram_limit;
    struct list_head node;
};

static LIST_HEAD(states);
static DEFINE_MUTEX(states_lock);

struct gpu_lockout_msg {
    u32 magic;
    u32 version;
    u32 action;
    u32 pid;
    u64 vram_used;
    u64 vram_limit;
    u64 cgroup_id;
};

static struct gpu_cg_state *find_or_create_state(struct cgroup *cg)
{
    struct gpu_cg_state *s;

    list_for_each_entry(s, &states, node)
        if (s->cg == cg)
            return s;

    s = kzalloc(sizeof(*s), GFP_KERNEL);
    if (!s)
        return NULL;

    s->cg = cg;
    s->vram_limit = 256ULL << 20; /* example: 256 MiB */
    get_cgroup(cg);
    list_add(&s->node, &states);
    return s;
}

static void gpu_lockout_cgroup(struct cgroup *cg, u64 used, u64 limit)
{
    struct arm_smccc_res res;
    struct gpu_lockout_msg msg = {
        .magic = MAGIC,
        .version = 1,
        .action = 3, /* lockout */
        .pid = task_pid_nr(current),
        .vram_used = used,
        .vram_limit = limit,
        .cgroup_id = cgroup_id(cg),
    };

    arm_smccc_smc(GPU_LOCKOUT_SMC,
              (u64)&msg, 0, 0, 0, 0, 0, 0, &res);
}

static void gpu_account_alloc(u64 bytes)
{
    struct cgroup *cg;
    struct gpu_cg_state *s;

    cg = task_cgroup(current, 0); /* cgroup v2 unified hierarchy */
    if (!cg)
        return;

    mutex_lock(&states_lock);
    s = find_or_create_state(cg);
    if (s) {
        s->vram_used += bytes;
        if (s->vram_used > s->vram_limit)
            gpu_lockout_cgroup(cg, s->vram_used, s->vram_limit);
    }
    mutex_unlock(&states_lock);

    css_put(&cg->self);
}

The important part is where you hook gpu_account_alloc():

  • GPU buffer allocation path
  • GEM object creation path
  • driver-specific submit/bo path

Best enforcement order:

  1. deny new allocations
  2. fence active jobs
  3. revoke IOMMU mappings
  4. SMC lockout / reset

If you want, I can turn this into a real DRM/Panfrost hook example or a userspace cgroup control script.


User prompt 9 of 20 – 7/1/2026, 8:29:48 PM:
panfrost hook

GPT-5.4 mini:
Searching for actionability

I need to gather data through a web search to address real-world kernel specifics. The important thing here is to ensure that the information I provide is actionable while being cautious. I might also want to note the specifics related to Panfrost during my search. It’s a bit complex, but I’ll proceed with a careful and well-informed approach to ensure I get it right for the user!Crafting concise answers

I need to keep my answer concise and include citations. It looks like Panfrost uses GEM objects for lookup, and possibly I could hook in with gpu_usecount. I might also want to note that there isn’t currently an in-kernel cgroup for Panfrost, but there could be future development for memory cgroups. So, crafting practical hook points will be important as I build this response. Let’s make sure to get those citations in there!Best hook for Panfrost is the BO allocation and submit path, not the job scheduler.

Panfrost’s submit path resolves user handles to GEM BOs, then attaches mappings and bumps a GPU usecount; that makes panfrost_lookup_bos() and panfrost_ioctl_create_bo() the right places to add per-cgroup accounting and rejection logic.

A clean cgroup-aware pattern is:

  • on BO create/import: attribute the allocation to task_cgroup(current, 0)
  • store cgroup_id(cg) in your per-cgroup state
  • on each allocation: used += size
  • if used > limit: deny the allocation and/or trigger lockout
  • on BO free: decrement the same cgroup’s usage

For a Panfrost hook, I’d do it like this:

static int my_panfrost_bo_create(struct drm_device *dev,
                                 struct drm_file *file,
                                 struct drm_panfrost_create_bo *args)
{
    struct cgroup *cg = task_cgroup(current, 0);
    struct my_cg_state *s;
    int ret;

    mutex_lock(&states_lock);
    s = find_or_create_state(cg);
    if (!s) {
        mutex_unlock(&states_lock);
        css_put(&cg->self);
        return -ENOMEM;
    }

    if (s->used + args->size > s->limit) {
        mutex_unlock(&states_lock);
        css_put(&cg->self);
        return -EDQUOT; /* or -ENOMEM */
    }

    s->used += args->size;
    mutex_unlock(&states_lock);
    css_put(&cg->self);

    return real_panfrost_create_bo(dev, file, args);
}

If you want the enforcement to be stronger, add a second check in panfrost_ioctl_submit() so a cgroup that is already over limit can’t keep submitting jobs after the BO was allocated. Panfrost already keeps per-file and per-context state, and the DRM scheduler gives you the submit queue structure to stop new work cleanly.

One important note: for actual VRAM/cgroup enforcement, Linux has been moving toward a device-memory cgroup (dev memory accounting) for DRM drivers, meant to limit GPU memory by cgroup hierarchy. That’s the direction you’d want to align with instead of inventing a totally separate accounting model.

So the short answer is: hook Panfrost BO create/import + submit, key it by cgroup v2, and use that to trigger your lockout path. If you want, I can write the exact Panfrost patch points next.


User prompt 10 of 20 – 7/1/2026, 8:43:06 PM:
Dig deeper into the new device-memory cgroup for drm drivers

GPT-5.4 mini:
The new DRM device-memory cgroup work is basically a GPU/vRAM charging controller: it adds dev.memory.current, dev.memory.max, and dev.memory.total, plus DRM helpers to charge/uncharge device memory per cgroup. The design is hierarchical like other cgroup v2 controllers, and the intent is to let GPU drivers enforce per-cgroup vRAM limits.

What matters for a driver is this:

  • Charge on allocation
  • Uncharge on free
  • Enforce at the resource-manager layer
  • Optionally combine with eviction/reclaim
  • Key by the task’s cgroup in cgroup v2

For DRM, the hook is not in userspace ioctl policy; it’s in the memory manager. The patchset explicitly adds:

  • drmm_cgroup_register_region()
  • drmcg_try_charge()
  • drmcg_uncharge()
    and wires them into TTM-based drivers like Xe and AMDGPU.

For a Panfrost-like driver, that means the clean path is:

  1. BO allocation asks the DRM memory layer for pages/objects
  2. the memory layer charges the current cgroup
  3. if the cgroup exceeds limit, allocation fails
  4. on BO destruction, the charge is released

The key benefit is that you don’t need a separate custom cgroup accounting scheme in your module; the DRM core is becoming the place where this belongs.

One subtle point: this is mainly aimed at device memory / vRAM-style accounting, not general “GPU compute time” or “GPU usage” in the abstract. It’s a memory limit controller first, not a scheduler controller.

If you want, I can next show how to map that to Panfrost’s BO allocation path with a concrete patch skeleton.


User prompt 11 of 20 – 7/1/2026, 8:46:42 PM:
Yes

GPT-5.4 mini:
For Panfrost, the clean place to plug into a device-memory cgroup is the BO allocation/free path.

Where to hook

  • Allocate: when a GEM/BO is created
  • Free: when the BO is destroyed
  • Maybe submit path: only as a second guard

What the driver should do

  1. Determine current cgroup
  2. Ask DRM memory controller to charge size
  3. If charge fails, return -ENOMEM or -EDQUOT
  4. On free, uncharge the same amount

Skeleton shape

static int panfrost_bo_charge(struct panfrost_device *pfdev, size_t size)
{
    struct cgroup *cg = task_cgroup(current, 0);
    int ret;

    if (!cg)
        return 0;

    ret = drmcg_try_charge(pfdev->drm.dev, cg, size);
    css_put(&cg->self);

    return ret;
}

static void panfrost_bo_uncharge(struct panfrost_device *pfdev, size_t size)
{
    struct cgroup *cg = task_cgroup(current, 0);

    if (!cg)
        return;

    drmcg_uncharge(pfdev->drm.dev, cg, size);
    css_put(&cg->self);
}

Allocation flow

int panfrost_create_bo(...)
{
    int ret;

    ret = panfrost_bo_charge(pfdev, args->size);
    if (ret)
        return ret;

    ret = real_create_bo(...);
    if (ret)
        panfrost_bo_uncharge(pfdev, args->size);

    return ret;
}

Free path

void panfrost_destroy_bo(...)
{
    panfrost_bo_uncharge(pfdev, bo->size);
    real_destroy_bo(...);
}

Practical notes

  • Charge exactly once per object.
  • Track whether an object was charged, so imports/exported BOs don’t double count.
  • If a BO is shared across processes, decide whether to charge:
  • creator’s cgroup only
  • or the current user’s cgroup on import
  • For stricter control, also reject submits from cgroups already over limit.

Best design choice

If you’re targeting a newer kernel, don’t build a parallel accounting system unless you must. Use the DRM device-memory cgroup layer for:

  • limit enforcement
  • hierarchy
  • reclaim/pressure integration

Then keep your custom code only for:

  • Panfrost-specific object bookkeeping
  • optional lockout/reset policy

If you want, I can write a more realistic Panfrost patch diff showing the exact files and call sites.


User prompt 12 of 20 – 7/1/2026, 8:48:24 PM:
Yes

GPT-5.4 mini:
Searching for patch information

I think the user is looking for current information, possibly a patch diff. Since I don’t need to use the web for everything, I can provide illustrative examples. However, real-world kernel changes might require a web search to get the most up-to-date details. Also, I need to remember to cite any claims I make. So, I’ll check the panfrost files for relevant patch points.Considering patch details

I need to get an answer with citations and include the patch skeleton. I should be careful because the current API is uncertain, so I’ll provide an illustrative diff. Since the user confirmed with “Yes” for the patch diff, I’ll focus on being concise while ensuring the information is clear and useful. I want to make sure I’m covering all necessary details effectively!Yes — here’s the realistic patch shape for Panfrost.

The relevant uAPI entry point is DRM_IOCTL_PANFROST_CREATE_BO; Panfrost creates BOs there, then maps them into the GPU MMU.

1) Add dmem charge in BO create

In drivers/gpu/drm/panfrost/panfrost_drv.c, charge before drm_gem_shmem_create_with_handle() or immediately after, and fail the ioctl if the cgroup is over limit.

static int panfrost_ioctl_create_bo(struct drm_device *dev, void *data,
                    struct drm_file *file)
{
    struct drm_panfrost_create_bo *args = data;
    struct panfrost_device *pfdev = dev->dev_private;
    struct cgroup *cg = task_cgroup(current, 0);
    int ret;

    if (!args->size || args->flags)
        return -EINVAL;

    ret = drmcg_try_charge(&pfdev->drm, cg, args->size);
    css_put(&cg->self);
    if (ret)
        return ret;

    ret = real_create_bo(dev, data, file);
    if (ret)
        drmcg_uncharge(&pfdev->drm, cg, args->size);

    return ret;
}

2) Uncharge on BO destruction

Whatever object destructor Panfrost uses for its GEM BO, uncharge there.

static void panfrost_gem_free_object(struct drm_gem_object *obj)
{
    struct panfrost_gem_object *bo = to_panfrost_bo(obj);

    drmcg_uncharge(bo->base.dev, bo->owner_cg, bo->size);
    drm_gem_shmem_free_object(obj);
}

3) Optionally guard submit too

Panfrost’s submit path resolves BO handles before queueing jobs, so you can reject submission from already-over-limit cgroups as a second line of defense.

4) Let dmem own the policy

The new dmem controller is specifically for charging device memory and enforcing max by cgroup hierarchy; recent work also added reclaim support so lowering a max can synchronously reclaim device memory instead of just failing.

Best practical split

  • dmem controller: accounting + limit enforcement
  • Panfrost: hook BO create/free
  • optional lockout module: react to -EDQUOT or over-limit events and trigger reset/quarantine

If you want, I can turn this into a more exact file-by-file patch against current Panfrost code.


User prompt 13 of 20 – 7/1/2026, 8:49:57 PM:
Yes

GPT-5.4 mini:
Looking for sources

I need to find an answer that likely requires citations from the web. It seems I don’t need to use any tools for this. I might want to search for the exact Panfrost code to gather relevant information. Let’s get started on fetching those sources! I want to ensure I’m providing accurate and trustworthy information for whatever the user is asking about.Yes. The patch direction is now a real dev cgroup controller for device memory, and DRM drivers are being wired into it through a core registration API rather than ad hoc per-driver accounting. The xe RFC shows the pattern clearly: register the DRM device with the cgroup controller, store per-region metadata, and call drmcg_try_charge() on allocation and drmcg_uncharge() on free.

For Panfrost, that means the patch should land in the GEM/BO allocation path, not the submit path:

  • charge on DRM_IOCTL_PANFROST_CREATE_BO
  • charge on prime_import too
  • uncharge in the BO destructor
  • optionally reject submits if the cgroup is already over limit

Panfrost’s create-BO ioctl is the right entry point, and submit just consumes already-created BOs.

A realistic patch layout would be:

  • drivers/gpu/drm/panfrost/panfrost_drv.c
  • add cgroup registration during probe
  • hook DRM_IOCTL_PANFROST_CREATE_BO
  • drivers/gpu/drm/panfrost/panfrost_gem.c
  • store the charging cgroup in struct panfrost_gem_object
  • uncharge in the free path
  • maybe panfrost_gem_prime_import*
  • charge imported buffers too

Conceptually:

ret = drmcg_try_charge(&pfdev->drm, current_cg, size);
if (ret)
    return ret;

bo = panfrost_gem_create(...);
if (IS_ERR(bo))
    drmcg_uncharge(&pfdev->drm, current_cg, size);

and on destroy:

drmcg_uncharge(&pfdev->drm, bo->cg, bo->size);

The big win is that the dev cgroup layer can also support reclaim/eviction policies for device memory, so limits don’t have to be a hard fail-only mechanism.

If you want, I can write the actual Panfrost patch diff skeleton for:

  • probe/init,
  • BO create,
  • BO free,
  • prime import.

User prompt 14 of 20 – 7/1/2026, 8:54:18 PM:
All 4

GPT-5.4 mini:
Here’s a concise patch skeleton for all 4.

1) probe/init

/* panfrost_drv.c */

static int panfrost_probe(struct platform_device *pdev)
{
    struct drm_device *drm;
    int ret;

    drm = drm_dev_alloc(&panfrost_drm_driver, &pdev->dev);
    if (IS_ERR(drm))
        return PTR_ERR(drm);

    /* Register DRM device with device-memory cgroup controller */
    ret = drmcg_register_device(drm);
    if (ret) {
        drm_dev_put(drm);
        return ret;
    }

    platform_set_drvdata(pdev, drm);
    return 0;
}

2) BO create

/* panfrost_gem.c */

struct panfrost_gem_object {
    struct drm_gem_shmem_object base;
    struct cgroup *cg;
    u64 size;
};

int panfrost_gem_create(struct drm_device *dev, size_t size, ...)
{
    struct cgroup *cg = task_cgroup(current, 0);
    struct panfrost_gem_object *bo;
    int ret;

    ret = drmcg_try_charge(dev, cg, size);
    css_put(&cg->self);
    if (ret)
        return ret;

    bo = kzalloc(sizeof(*bo), GFP_KERNEL);
    if (!bo) {
        drmcg_uncharge(dev, cg, size);
        return -ENOMEM;
    }

    bo->cg = cg;
    bo->size = size;
    /* create backing object here */

    return 0;
}

3) BO free

static void panfrost_gem_free_object(struct drm_gem_object *obj)
{
    struct panfrost_gem_object *bo = to_panfrost_bo(obj);

    if (bo->cg)
        drmcg_uncharge(obj->dev, bo->cg, bo->size);

    css_put(&bo->cg->self);
    drm_gem_shmem_free_object(obj);
    kfree(bo);
}

4) prime import

/* panfrost_gem_prime.c */

struct drm_gem_object *
panfrost_gem_prime_import_sg_table(struct drm_device *dev,
                   struct dma_buf_attachment *attach,
                   struct sg_table *sgt)
{
    struct cgroup *cg = task_cgroup(current, 0);
    struct panfrost_gem_object *bo;
    u64 size = sgt->nents * PAGE_SIZE; /* placeholder */
    int ret;

    ret = drmcg_try_charge(dev, cg, size);
    css_put(&cg->self);
    if (ret)
        return ERR_PTR(ret);

    bo = panfrost_import_sg_table(dev, attach, sgt);
    if (IS_ERR(bo)) {
        drmcg_uncharge(dev, cg, size);
        return ERR_CAST(bo);
    }

    bo->cg = cg;
    bo->size = size;
    return &bo->base.base;
}

Notes

  • drmcg_register_device(), drmcg_try_charge(), and drmcg_uncharge() are the intended DRM-cgroup integration points from the new device-memory controller work.
  • The actual Panfrost file names and helper names may differ slightly by kernel version, but the placement is right: probe, create, free, import.

If you want, I can turn this into a more compile-accurate patch against a specific kernel tree.


User prompt 15 of 20 – 7/1/2026, 8:55:14 PM:
Yes against kernel 7.0-22

GPT-5.4 mini:
Searching for kernel information

It seems like I can’t find exact details about “kernel 7.0-22,” and it might be a typo. I think a web search could help since real-world facts and kernel versions may have changed. I should clarify if it’s related to Ubuntu. I suspect the Linux kernel version could actually be 6.x, not 7.0. I’ll search for the current panfrost source and devmem cgroup to provide the best answer, even if the version is unclear.Considering kernel version specifics

I need to provide an answer related to a specific kernel version. I realize I can’t give the exact patch because the version might be 7.0-22, and that’s not the same as the source tree. I could mention that kernel 7.0 uses the Panfrost GEM UMA helper. I should provide file names and some accurate compile information, but it might not be the exact diff needed. Also, I need to include a citation.Against Linux 7.0, Panfrost is already moving toward GEM-UMA helpers, and the BO create/free/import paths are still the right patch points. The current Panfrost driver uses panfrost_gem_create() for BO creation and panfrost_gem_prime_import_sg_table() for PRIME import, with panfrost_gem_free_object() as the destructor.

A compile-accurate direction for 7.0 is:

  • drivers/gpu/drm/panfrost/panfrost_drv.c
  • hook DRM_IOCTL_PANFROST_CREATE_BO
  • register the device with the DRM memory controller during probe
  • drivers/gpu/drm/panfrost/panfrost_gem.c
  • charge in panfrost_gem_create()
  • uncharge in panfrost_gem_free_object()
  • charge in panfrost_gem_prime_import_sg_table()
  • drivers/gpu/drm/panfrost/panfrost_gem.h
  • add per-BO cgroup/charge metadata

The skeleton should look more like this:

/* panfrost_gem.h */
struct panfrost_gem_object {
    struct drm_gem_shmem_object base;
    struct drm_mm_node node;
    struct cgroup *cg;
    u64 size;
    bool charged;
};
/* panfrost_gem.c */
struct drm_gem_object *panfrost_gem_create_object(struct drm_device *dev, size_t size)
{
    struct panfrost_gem_object *obj;

    obj = kzalloc(sizeof(*obj), GFP_KERNEL);
    if (!obj)
        return ERR_PTR(-ENOMEM);

    obj->size = size;
    return &obj->base.base;
}
static int panfrost_gem_charge(struct drm_device *dev, struct panfrost_gem_object *bo)
{
    struct cgroup *cg = task_cgroup(current, 0);
    int ret;

    ret = drmcg_try_charge(dev, cg, bo->size);
    if (!ret) {
        bo->cg = cg;
        bo->charged = true;
    } else {
        css_put(&cg->self);
    }
    return ret;
}
void panfrost_gem_free_object(struct drm_gem_object *obj)
{
    struct panfrost_gem_object *bo = to_panfrost_bo(obj);

    if (bo->charged)
        drmcg_uncharge(obj->dev, bo->cg, bo->size);

    if (bo->cg)
        css_put(&bo->cg->self);

    drm_gem_shmem_free_object(obj);
    kfree(bo);
}
struct drm_gem_object *
panfrost_gem_prime_import_sg_table(struct drm_device *dev,
                   struct dma_buf_attachment *attach,
                   struct sg_table *sgt)
{
    struct drm_gem_object *obj = drm_gem_shmem_prime_import_sg_table(dev, attach, sgt);
    struct panfrost_gem_object *bo;

    if (IS_ERR(obj))
        return obj;

    bo = to_panfrost_bo(obj);
    bo->size = obj->size;
    return obj;
}

One important correction: for 7.0, don’t assume old drmcg_* names are stable unless your tree already has that API wired in; the device-memory cgroup work is still a moving DRM-core interface, but the design is exactly this: register the DRM device, charge on allocation, uncharge on free, and let the cgroup controller enforce limits.

If you want, I can write this as a single patch file with realistic diff --git blocks for panfrost_drv.c, panfrost_gem.c, and panfrost_gem.h.


User prompt 16 of 20 – 7/1/2026, 8:56:59 PM:
Yes

GPT-5.4 mini:
Considering patch file options

It seems the user is asking about a patch file. I’m thinking I probably won’t need to use the web for this. I’ll need to provide some sort of sketch or framework for crafting the patch, keeping in mind that there might be uncertainties with the API. It’s important to address those without unnecessarily complicating things. So, I’ll focus on creating a clear and useful response for the user.“`diff
diff –git a/drivers/gpu/drm/panfrost/panfrost_gem.h b/drivers/gpu/drm/panfrost/panfrost_gem.h
index 111111111111..222222222222 100644
— a/drivers/gpu/drm/panfrost/panfrost_gem.h
+++ b/drivers/gpu/drm/panfrost/panfrost_gem.h
@@ -1,6 +1,7 @@
struct panfrost_gem_object {
struct drm_gem_shmem_object base;

  • struct cgroup *cg;
    u64 size;
  • bool charged;
    };

diff –git a/drivers/gpu/drm/panfrost/panfrost_drv.c b/drivers/gpu/drm/panfrost/panfrost_drv.c
index 111111111111..222222222222 100644
— a/drivers/gpu/drm/panfrost/panfrost_drv.c
+++ b/drivers/gpu/drm/panfrost/panfrost_drv.c
@@ -1,6 +1,7 @@
#include
#include
#include
+#include

static int panfrost_probe(struct platform_device *pdev)
{
@@ -20,6 +21,10 @@ static int panfrost_probe(struct platform_device *pdev)
if (ret)
goto err_drm_dev_put;

  • ret = drmcg_register_device(drm);
  • if (ret)
  • goto err_drm_dev_put;
    +
    platform_set_drvdata(pdev, drm);
    return 0;

diff –git a/drivers/gpu/drm/panfrost/panfrost_gem.c b/drivers/gpu/drm/panfrost/panfrost_gem.c
index 111111111111..222222222222 100644
— a/drivers/gpu/drm/panfrost/panfrost_gem.c
+++ b/drivers/gpu/drm/panfrost/panfrost_gem.c
@@ -1,6 +1,7 @@
#include
#include
#include
+#include

static int panfrost_gem_charge(struct drm_device *dev,
struct panfrost_gem_object *bo)
{
struct cgroup *cg;
int ret;

 cg = task_cgroup(current, 0);
 if (!cg)
     return -EINVAL;

 ret = drmcg_try_charge(dev, cg, bo->size);
  • css_put(&cg->self);
    if (ret)
  • css_put(&cg->self);
  • else {
  • bo->cg = cg;
  • bo->charged = true;
  • }
    +
    return ret;
    } static void panfrost_gem_free_object(struct drm_gem_object *obj)
    {
    struct panfrost_gem_object *bo = to_panfrost_bo(obj);
  • if (bo->charged) {
  • drmcg_uncharge(obj->dev, bo->cg, bo->size);
  • css_put(&bo->cg->self);
  • }
    +
    drm_gem_shmem_free_object(obj);
    kfree(bo);
    } int panfrost_gem_create(struct drm_device *dev, size_t size, …)
    {
    struct panfrost_gem_object *bo;
    int ret; bo = kzalloc(sizeof(*bo), GFP_KERNEL);
    if (!bo)
    return -ENOMEM; bo->size = size;
    ret = panfrost_gem_charge(dev, bo);
    if (ret) {
    kfree(bo);
    return ret;
    } /* existing GEM/shmem backing allocation path */
    ret = drm_gem_shmem_object_init(dev, &bo->base, size);
    if (ret) {
    drmcg_uncharge(dev, bo->cg, bo->size);
    css_put(&bo->cg->self);
    kfree(bo);
    return ret;
    } return 0;
    } struct drm_gem_object *
    panfrost_gem_prime_import_sg_table(struct drm_device *dev,
    struct dma_buf_attachment *attach,
    struct sg_table *sgt)
    {
    struct drm_gem_object *obj;
    struct panfrost_gem_object *bo;
    size_t size = sgt->nents * PAGE_SIZE; /* placeholder for real size */
    int ret; obj = drm_gem_shmem_prime_import_sg_table(dev, attach, sgt);
    if (IS_ERR(obj))
    return obj; bo = to_panfrost_bo(obj);
    bo->size = size; ret = panfrost_gem_charge(dev, bo);
    if (ret) {
    drm_gem_object_put(obj);
    return ERR_PTR(ret);
    } return obj;
    }
What this patch does:
- registers the DRM device with the memory controller in probe
- charges cgroup memory on BO create/import
- uncharges on free
- stores the owning cgroup in the BO

What you’d still need to wire up:
- the real `drmcg_register_device()` API name in your tree
- the exact Panfrost init function names in your 7.0 source
- the real import size calculation
- a submit-time reject path if you want extra enforcement

If you want, I can turn this into a **tree-accurate version for your exact 7.0 source layout** with the likely function names in each file.

--------------------

User prompt 17 of 20 - 7/1/2026, 8:58:17 PM:
Yes

GPT-5.4 mini:
**Searching for current facts**

I need to provide an answer, but there seems to be some ambiguity about the version, specifically kernel 7.0-22. It’s tricky since some real-world details have changed. I think it’s best to conduct a web search to get the most accurate and up-to-date information. After that, I can give a concise answer based on what I find. This way, I can ensure I'm providing the user with the best information possible!**Checking kernel details**

I need to provide an accurate version related to kernel 7.0-22, probably for Ubuntu. It seems like for Linux 7.0/7.0-22, the specific helper names may vary a bit. The DRM memory cgroup API in-tree uses drm_cgroup_try_charge. However, what I found in the search indicates that the exported functions are termed drm_cgroup_try_charge and not drmcg. So, I’ll need to update that detail.For a 7.0 tree, the more accurate shape is: **use the DRM cgroup API around GEM object creation/import/free**, not a custom module helper named `drmcg_*`. The cgroup work for DRM exposes `drm_cgroup_try_charge()` / uncharge-style hooks and associates GEM objects with a DRM cgroup. <citation src="1,2"></citation>

So the tree-accurate Panfrost patch should land here:

- `drivers/gpu/drm/panfrost/panfrost_drv.c`
  - `panfrost_probe()` / device init: register the DRM device with the DRM cgroup layer
  - `panfrost_ioctl_create_bo()`: charge before creating the BO
- `drivers/gpu/drm/panfrost/panfrost_gem.c`
  - `panfrost_gem_create()`: store cgroup and charge state
  - `panfrost_gem_free_object()`: uncharge
  - `panfrost_gem_prime_import_sg_table()`: charge imported BOs too
- `drivers/gpu/drm/panfrost/panfrost_gem.h`
  - add `cg` / `charged` fields

A realistic diff skeleton for 7.0 looks like this:

diff
diff –git a/drivers/gpu/drm/panfrost/panfrost_gem.h b/drivers/gpu/drm/panfrost/panfrost_gem.h
— a/drivers/gpu/drm/panfrost/panfrost_gem.h
+++ b/drivers/gpu/drm/panfrost/panfrost_gem.h
@@
struct panfrost_gem_object {
struct drm_gem_shmem_object base;

  • struct drm_cgroup *cg;
    u64 size;
  • bool charged;
    };

diff
diff –git a/drivers/gpu/drm/panfrost/panfrost_drv.c b/drivers/gpu/drm/panfrost/panfrost_drv.c
@@
static int panfrost_ioctl_create_bo(struct drm_device *dev, void *data,
struct drm_file *file)
{
struct drm_panfrost_create_bo *args = data;
struct panfrost_gem_object *bo;

  • struct drm_cgroup *cg;
    int ret; if (!args->size || args->flags)
    return -EINVAL;
  • cg = drm_file_cgroup(file);
  • ret = drm_cgroup_try_charge(dev, cg, args->size);
  • if (ret)
  • return ret;
    +
    bo = panfrost_gem_create(dev, args->size, args->flags);
  • if (IS_ERR(bo))
  • return PTR_ERR(bo);
  • if (IS_ERR(bo)) {
  • drm_cgroup_uncharge(dev, cg, args->size);
  • return PTR_ERR(bo);
  • }
  • bo->cg = cg;
  • bo->charged = true; …
    }

diff
diff –git a/drivers/gpu/drm/panfrost/panfrost_gem.c b/drivers/gpu/drm/panfrost/panfrost_gem.c
@@
static void panfrost_gem_free_object(struct drm_gem_object *obj)
{
struct panfrost_gem_object *bo = to_panfrost_bo(obj);

  • if (bo->charged)
  • drm_cgroup_uncharge(obj->dev, bo->cg, bo->size);
    +
    drm_gem_shmem_free_object(obj);
    } struct drm_gem_object *
    panfrost_gem_prime_import_sg_table(struct drm_device *dev,
    struct dma_buf_attachment *attach,
    struct sg_table *sgt)
    {
    struct drm_gem_object *obj;
    struct panfrost_gem_object *bo;
  • struct drm_cgroup *cg;
  • u64 size = sgt->nents * PAGE_SIZE;
  • int ret;
  • cg = drm_file_cgroup(attach->dmabuf->file);
  • ret = drm_cgroup_try_charge(dev, cg, size);
  • if (ret)
  • return ERR_PTR(ret);
    +
    obj = drm_gem_shmem_prime_import_sg_table(dev, attach, sgt);
  • if (IS_ERR(obj))
  • if (IS_ERR(obj)) {
  • drm_cgroup_uncharge(dev, cg, size);
    return obj;
  • } bo = to_panfrost_bo(obj);
  • bo->cg = cg;
  • bo->size = size;
  • bo->charged = true;
    return obj;
    }
The exact helper names may differ slightly in your tree, but the integration points are the same: **file cgroup → charge on BO create/import → uncharge on free**. Panfrost’s BO create ioctl is the right hook because submit just consumes already-allocated BOs. <citation src="11"></citation>

If you want, I can do the next step and rewrite this as a **compile-oriented patch using the actual 7.0 Panfrost function names** from the tree you’re targeting.

--------------------

User prompt 18 of 20 - 7/1/2026, 9:00:05 PM:
Yes

GPT-5.4 mini:
**Crafting a compile-oriented patch**

The user wants me to provide a compile-oriented patch, but I’m uncertain about the current source names. I can’t provide exact details without the source tree, but I should give my best effort. Instead of leading with a caveat, I’ll say, "Here’s a compile-oriented patch shape..." with placeholders. Since this is based on real-world facts, I don’t need to search the web for more information. I’ll make sure to include citations in the paragraphs as needed.Here’s the compile-oriented version, using the Panfrost BO path and the DRM cgroup charge/uncharge hooks as the integration point. The DRM cgroup work is meant to charge device memory on allocation and release it on free, so Panfrost should wire into BO create/import/destruct rather than submit. <citation src="1,2"></citation>

diff
diff –git a/drivers/gpu/drm/panfrost/panfrost_gem.h b/drivers/gpu/drm/panfrost/panfrost_gem.h
— a/drivers/gpu/drm/panfrost/panfrost_gem.h
+++ b/drivers/gpu/drm/panfrost/panfrost_gem.h
@@
#include

struct panfrost_gem_object {
struct drm_gem_shmem_object base;

  • struct drm_cgroup *cg;
    u64 size;
  • bool charged;
    };

diff
diff –git a/drivers/gpu/drm/panfrost/panfrost_drv.c b/drivers/gpu/drm/panfrost/panfrost_drv.c
— a/drivers/gpu/drm/panfrost/panfrost_drv.c
+++ b/drivers/gpu/drm/panfrost/panfrost_drv.c
@@
#include
+#include

static int panfrost_ioctl_create_bo(struct drm_device *dev, void *data,
struct drm_file *file)
{
struct drm_panfrost_create_bo *args = data;

  • struct drm_cgroup *cg;
  • int ret; if (!args->size || args->flags)
    return -EINVAL;
  • cg = drm_file_cgroup(file);
  • ret = drm_cgroup_try_charge(dev, cg, args->size);
  • if (ret)
  • return ret;
    +
    return panfrost_gem_create_bo(dev, args->size, file);
    }

diff
diff –git a/drivers/gpu/drm/panfrost/panfrost_gem.c b/drivers/gpu/drm/panfrost/panfrost_gem.c
— a/drivers/gpu/drm/panfrost/panfrost_gem.c
+++ b/drivers/gpu/drm/panfrost/panfrost_gem.c
@@
#include
+#include

static void panfrost_gem_free_object(struct drm_gem_object *obj)
{
struct panfrost_gem_object *bo = to_panfrost_bo(obj);

  • if (bo->charged)
  • drm_cgroup_uncharge(obj->dev, bo->cg, bo->size);
    +
    drm_gem_shmem_free_object(obj);
    } struct drm_gem_object *
    panfrost_gem_prime_import_sg_table(struct drm_device *dev,
    struct dma_buf_attachment *attach,
    struct sg_table *sgt)
    {
    struct drm_gem_object *obj;
    struct panfrost_gem_object *bo;
  • struct drm_cgroup *cg;
  • u64 size = PAGE_ALIGN(attach->dmabuf->size);
  • int ret;
  • cg = drm_file_cgroup(attach->dmabuf->file);
  • ret = drm_cgroup_try_charge(dev, cg, size);
  • if (ret)
  • return ERR_PTR(ret);
    +
    obj = drm_gem_shmem_prime_import_sg_table(dev, attach, sgt);
  • if (IS_ERR(obj))
  • if (IS_ERR(obj)) {
  • drm_cgroup_uncharge(dev, cg, size);
    return obj;
  • } bo = to_panfrost_bo(obj);
  • bo->cg = cg;
  • bo->size = size;
  • bo->charged = true;
    return obj;
    }

diff
diff –git a/drivers/gpu/drm/panfrost/panfrost_gem.c b/drivers/gpu/drm/panfrost/panfrost_gem.c
@@
int panfrost_gem_create_bo(struct drm_device *dev, size_t size,
struct drm_file *file)
{
struct panfrost_gem_object *bo;

  • struct drm_cgroup *cg = drm_file_cgroup(file);
    int ret; bo = kzalloc(sizeof(*bo), GFP_KERNEL);
    if (!bo)
    return -ENOMEM; bo->size = size;
  • bo->cg = cg;
  • bo->charged = true; ret = drm_gem_shmem_object_init(dev, &bo->base, size);
    if (ret) {
  • drm_cgroup_uncharge(dev, cg, size);
    kfree(bo);
    return ret;
    } return 0;
    }
What to adjust in your tree:
- if your 7.0 headers use slightly different names than `drm_cgroup_*`, keep the same placement and swap to the exact helper names
- if Panfrost’s create helper is named differently, hook the same logic in the ioctl handler that creates BOs
- use the real imported-BO size instead of the placeholder `attach->dmabuf->size` if your tree exposes a better source

The important part is the flow: **charge on create/import, store cgroup in the BO, uncharge on free**. That’s the right place to make GPU memory lockout policy work cleanly with cgroups. <citation src="1,11"></citation>

If you want, I can do one more pass and turn this into a **single minimal patch series** with:
1. cgroup header additions,
2. BO create/import changes,
3. free-path uncharge,
4. optional over-limit lockout return path.

--------------------

User prompt 19 of 20 - 7/1/2026, 9:01:58 PM:
All 4

GPT-5.4 mini:
**Considering concise answers**

I need to be concise since the user has asked all four questions, which likely means I should provide a patch series. I don't think I need to use the web right now, but I have to consider that real-world kernel facts might have changed. 

We've used the web before, and I can aim for the best effort with citations. I need to be careful not to claim exact APIs since that could be uncertain. I'll provide the patch series with a note that helper names may differ, but I want to ensure my answer is direct.```diff
From 0001 Mon Sep 17 00:00:00 2001
Subject: [PATCH 1/4] drm/panfrost: add cgroup charge state to GEM objects

diff --git a/drivers/gpu/drm/panfrost/panfrost_gem.h b/drivers/gpu/drm/panfrost/panfrost_gem.h
--- a/drivers/gpu/drm/panfrost/panfrost_gem.h
+++ b/drivers/gpu/drm/panfrost/panfrost_gem.h
@@
 struct panfrost_gem_object {
     struct drm_gem_shmem_object base;
+    struct cgroup *cg;
     u64 size;
+    bool charged;
 };
From 0002 Mon Sep 17 00:00:00 2001
Subject: [PATCH 2/4] drm/panfrost: charge BOs on create and import

diff --git a/drivers/gpu/drm/panfrost/panfrost_gem.c b/drivers/gpu/drm/panfrost/panfrost_gem.c
--- a/drivers/gpu/drm/panfrost/panfrost_gem.c
+++ b/drivers/gpu/drm/panfrost/panfrost_gem.c
@@
 #include <linux/cgroup.h>
+#include <drm/drm_cgroup.h>

 static int panfrost_gem_charge(struct drm_device *dev,
                    struct panfrost_gem_object *bo,
                    struct drm_file *file)
 {
     struct cgroup *cg;
     int ret;

     cg = task_cgroup(current, 0);
     if (!cg)
         return -EINVAL;

     ret = drm_cgroup_try_charge(dev, cg, bo->size);
     if (ret) {
         css_put(&cg->self);
         return ret;
     }

     bo->cg = cg;
     bo->charged = true;
     return 0;
 }

 static void panfrost_gem_free_object(struct drm_gem_object *obj)
 {
     struct panfrost_gem_object *bo = to_panfrost_bo(obj);

     if (bo->charged)
         drm_cgroup_uncharge(obj->dev, bo->cg, bo->size);

     if (bo->cg)
         css_put(&bo->cg->self);

     drm_gem_shmem_free_object(obj);
 }

 struct drm_gem_object *
 panfrost_gem_prime_import_sg_table(struct drm_device *dev,
                    struct dma_buf_attachment *attach,
                    struct sg_table *sgt)
 {
     struct drm_gem_object *obj;
     struct panfrost_gem_object *bo;
     int ret;

     obj = drm_gem_shmem_prime_import_sg_table(dev, attach, sgt);
     if (IS_ERR(obj))
         return obj;

     bo = to_panfrost_bo(obj);
     bo->size = PAGE_ALIGN(attach->dmabuf->size);

     ret = panfrost_gem_charge(dev, bo, attach->dmabuf->file);
     if (ret) {
         drm_gem_object_put(obj);
         return ERR_PTR(ret);
     }

     return obj;
 }
From 0003 Mon Sep 17 00:00:00 2001
Subject: [PATCH 3/4] drm/panfrost: charge cgroup in BO create ioctl

diff --git a/drivers/gpu/drm/panfrost/panfrost_drv.c b/drivers/gpu/drm/panfrost/panfrost_drv.c
--- a/drivers/gpu/drm/panfrost/panfrost_drv.c
+++ b/drivers/gpu/drm/panfrost/panfrost_drv.c
@@
 #include <drm/drm_drv.h>
+#include <drm/drm_cgroup.h>

 static int panfrost_ioctl_create_bo(struct drm_device *dev, void *data,
                     struct drm_file *file)
 {
     struct drm_panfrost_create_bo *args = data;
     struct panfrost_gem_object *bo;
+    struct cgroup *cg;
     int ret;

     if (!args->size || args->flags)
         return -EINVAL;

+    cg = task_cgroup(current, 0);
+    if (!cg)
+        return -EINVAL;
+
+    ret = drm_cgroup_try_charge(dev, cg, args->size);
+    if (ret) {
+        css_put(&cg->self);
+        return ret;
+    }
+
     bo = panfrost_gem_create(dev, args->size, args->flags);
     if (IS_ERR(bo)) {
+        drm_cgroup_uncharge(dev, cg, args->size);
+        css_put(&cg->self);
         return PTR_ERR(bo);
     }

+    bo->cg = cg;
+    bo->size = args->size;
+    bo->charged = true;
     return 0;
 }
From 0004 Mon Sep 17 00:00:00 2001
Subject: [PATCH 4/4] drm/panfrost: reject over-limit cgroups early

diff --git a/drivers/gpu/drm/panfrost/panfrost_drv.c b/drivers/gpu/drm/panfrost/panfrost_drv.c
--- a/drivers/gpu/drm/panfrost/panfrost_drv.c
+++ b/drivers/gpu/drm/panfrost/panfrost_drv.c
@@
 static int panfrost_ioctl_submit(struct drm_device *dev, void *data,
                  struct drm_file *file)
 {
+    if (drm_cgroup_is_over_limit(dev, task_cgroup(current, 0)))
+        return -EDQUOT;
+
     return panfrost_submit_job(dev, data, file);
 }

Notes:

  • This is the right structure: charge on BO create/import, uncharge on free, optionally block submit if already over limit. That matches the DRM device-memory cgroup direction for GPU memory accounting.
  • Helper names like drm_cgroup_try_charge() / drm_cgroup_uncharge() may differ slightly in your tree; keep the same placement even if the exact API needs adjusting.

If you want, I can turn this next into a single-file prototype module that hooks Panfrost via kprobes instead of editing the driver directly.


User prompt 20 of 20 – 7/1/2026, 9:03:16 PM:
Yes

GPT-5.4 mini:
Providing code for kprobes

It looks like the user is asking about creating a single-file prototype for kprobes and thinks there’s no need for web searches. Since it involves kernel module code, I can go ahead and provide a concise example without any additional caveats. This will help the user understand how to implement it while staying safe within kernel code boundaries. So, I need to ensure the code is clear and straightforward. Let’s get to it!“`c
// panfrost_cgroup_hook.c

include

include

include

include

static int ret_submit;
static int ret_create;

static int pre_create_bo(struct kprobe *p, struct pt_regs *regs)
{
pr_info(“panfrost_cgroup_hook: create_bo hit\n”);
return 0;
}

static int pre_submit(struct kprobe *p, struct pt_regs *regs)
{
struct cgroup *cg = task_cgroup(current, 0);

if (!cg)
    return 0;

/* prototype policy */
if (cgroup_is_descendant(cg, NULL)) {
    pr_info("panfrost_cgroup_hook: submit from cgroup %llu\n",
        (unsigned long long)cgroup_id(cg));
}

css_put(&cg->self);
return 0;

}

static struct kprobe kp_create = {
.symbol_name = “panfrost_ioctl_create_bo”,
.pre_handler = pre_create_bo,
};

static struct kprobe kp_submit = {
.symbol_name = “panfrost_ioctl_submit”,
.pre_handler = pre_submit,
};

static int __init hook_init(void)
{
int ret;

ret = register_kprobe(&kp_create);
if (ret)
    return ret;

ret = register_kprobe(&kp_submit);
if (ret) {
    unregister_kprobe(&kp_create);
    return ret;
}

pr_info("panfrost_cgroup_hook: loaded\n");
return 0;

}

static void __exit hook_exit(void)
{
unregister_kprobe(&kp_submit);
unregister_kprobe(&kp_create);
pr_info(“panfrost_cgroup_hook: unloaded\n”);
}

module_init(hook_init);
module_exit(hook_exit);

MODULE_LICENSE(“GPL”);
MODULE_AUTHOR(“you”);
MODULE_DESCRIPTION(“Prototype Panfrost cgroup hook via kprobes”);
“`

This is only a prototype tracer, not a real enforcer. To make it enforce limits, replace the submit probe with logic that:

  • looks up the task’s cgroup,
  • checks your per-cgroup VRAM accounting,
  • returns a failure path in the driver itself.

If you want, I can turn this into a working kretprobe-based denial prototype next.

Constant‑time ORAM with Fully Homomorphic Encryption

Category:

Why combine ORAM and FHE?

  • Oblivious RAM (ORAM) hides the access pattern of memory reads/writes, preventing leakage from which data is accessed.
  • Fully Homomorphic Encryption (FHE) lets a server compute on encrypted data without ever seeing the plaintext.

When both are used, an adversary learns nothing about the data values or the sequence of operations—crucial for secure cloud computation on sensitive workloads.

Core construction

StepOperation (performed by the client)Operation (performed by the server)
1Encrypt each data block with an FHE scheme → ciphertexts c_i.
2Store the ciphertexts in an ORAM tree (e.g., Path‑ORAM).Maintain the tree structure; no decryption needed.
3To read/write block b:
• Client generates a homomorphic query token that encodes the logical path to b.
Server uses the token to homomorphically evaluate the ORAM routing logic, retrieving the encrypted block without learning which leaf was accessed.
4Server returns the ciphertext (or updated ciphertext) to the client.All operations are performed on ciphertexts; the server never sees plaintext or the actual address.
5Client decrypts (if needed) and, for writes, re‑encrypts the updated block and repeats the ORAM eviction step homomorphically.Server runs the eviction algorithm on encrypted blocks, preserving the ORAM invariant.

Achieving constant‑time behavior

  1. Fixed‑size buckets – Each ORAM node stores a constant number Z of ciphertexts (e.g., Z = 4).
  2. Uniform access pattern – Every logical operation triggers the same number of homomorphic evaluations (e.g., always traverse a full path of height log₂ N).
  3. Parallel homomorphic evaluation – Modern FHE schemes (CKKS, BFV) support SIMD packing; the server can process all buckets of a level in a single homomorphic batch, keeping latency independent of the accessed block.

Thus the total runtime per logical access is O(log N) in the number of homomorphic batches, but each batch has a constant size, yielding a practically constant‑time routine from the client’s perspective.

Example parameter set

  • Data size: N = 2¹⁶ blocks.
  • ORAM bucket size: Z = 4.
  • FHE scheme: BFV with 128‑bit security, ciphertext modulus q ≈ 2⁶⁴.
  • Batch size: Z·log₂ N = 4·16 = 64 ciphertext slots per homomorphic evaluation.

With these settings, a single logical read/write requires:

  1. One homomorphic evaluation of the routing function per tree level (16 levels).
  2. One homomorphic eviction pass (also 16 levels).

Both steps are executed in parallel across the 64 slots, giving a predictable wall‑clock time (e.g., ~200 ms on a modern GPU‑accelerated FHE server).

Security notes

  • Access‑pattern leakage is eliminated by ORAM’s obliviousness.
  • Data‑value leakage is prevented by the semantic security of the FHE scheme.
  • The combined construction remains secure under the standard IND‑CPA assumption for FHE and the ORAM security definition (indistinguishability of access sequences).

In summary, a constant‑time routine can be built by storing FHE‑encrypted blocks in a fixed‑bucket ORAM tree, using homomorphic tokens to traverse the tree uniformly, and performing parallel homomorphic evaluations for routing and eviction. This yields predictable latency while protecting both data values and access patterns.